Andes晶心科技与普林芯驰联手打造高新性端侧AI音频处理器 搭载AndesCore® D25F RISC-V处理器核心

2023年10月25日 – 32/64位、高效能低功耗的RISC-V处理器核心领导供货商暨RISC-V国际协会创始首席会员Andes晶心科技（TWSE: 6533）和智能家居、传统家电、消费电子等领域的高新技术企业珠海普林芯驰科技今日共同宣布采用Andes晶心科技的AndesCore® D25F处理器的SPV60系列端侧音频处理器，将传统音频与智能音频完美融合，造就全新一代端侧AI音频处理器。

Andes晶心科技的D25F RISC-V处理器是基于AndeStar™ V5 架构的 32 位 CPU IP 核，在RISC-V架构的基础上进行扩展并保持兼容性。D25F支持RISC-V DSP/SIMD （P）扩展指令集（草案版本）。搭配使用RISC-V DSP/SIMD（P）扩充指令集编译程序、DSP 函式库和仿真器等完整支持工具与效能高度优化的AndeSoft™ NN Library，可以帮助客户很有效率的加速AI应用计算。此外，D25F具有许多选配功能，例如指令和数据快取、低延迟的区域内存、以及用于保护内存的ECC。D25F可配置为AXI 64 位或 AHB 64/32 位总线接口，还有一个可用于从外部直接读/写本地内存的端口，以确保内存存取的速度和安全性。它还配置平台中断控制器（PLIC），可以提供超过 1000个中断服务，以实现快速中断响应、优先级排序和抢占。此外，Andes Custom Extension™ （ACE）可通过自定义的特殊用途指令提供额外的灵活性。综合上述丰富的功能和配置选项，以及具有出色的效率，能提供领先业界的每兆赫（per-MHz）性能，D25F在嵌入式控制器市场上是首个也可能是最受欢迎支持DSP的RISC-V内核。

与此同时，普林芯驰推出的全新一代SPV60系列端侧AI音频处理器芯片，采用CPU+NPU+uDSP多核异构架构，将不同类型的处理器核心结合在一起，以便高效地处理各种任务，特别是在音频处理领域。 这种多核异构架构的设计在AI音频处理器芯片中非常有意义。SPV60系列端侧AI音频处理器集成Andes D25F、普林芯驰全新自研设计的uDSP以及AI神经网络处理器内核NPU。其中D25F CPU最高主频超过400MHz，能够处理通用的计算任务; NPU算力达到100Gops，专门优化神经网络计算; 而uDSP核心专注于数字信号处理，根据已知的需求和算法积累做专项并行加速器。这些功能的结合能够在音频处理中实现更好的性能和效率。芯片同时内建高性能、动态范围超过105dB，THD+N小于-95dB的音频AD （analog to digital）转换器和动态范围超过105dB，THD+N小于 -90dB 的DA（digital to analog）转换器，以及0V直驱耳机放大器模块，性能达到准专业级水平。芯片还集成丰富的USB2.0、SD、SPI、UART、I2C、I2S等外设接口；芯片配套提供AI降噪，AI回声消除，AI啸叫抑制，语音识别等算法。普林芯驰的端侧AI音频处理器芯片不仅关注卓越的性能，还注重低功耗。这对于嵌入式系统和移动设备等领域至关重要，因为它可以提供高性能并同时延长设备的电池寿命。普林芯驰提供专业的设计能力，完善的配套工具和参考设计，让SPV60系列芯片可广泛的应用在智能语音、智能耳机、专业音频等领域，已经进入量产流程。

「普林芯驰与Andes晶心科技的合作已经持续数年。Andes晶心科技的处理器提供强大的性能以及许多选配功能。」普林芯驰 CEO 胡颖哲说道。「D25F RISC-V处理器和普林芯驰的多核异构AI音频处理器芯片这两项技术的结合，为音频处理、嵌入式系统和移动设备领域带来更多创新和可能性。通过Andes晶心科技提供的处理器和技术支持，相信两家公司在未来会有更多合作的机会。」

「Andes晶心科技的AndesCore® D25F提供包括支持DSP/SIMD扩展指令集的高效的性能和灵活的配置，使其成为高性能嵌入式控制器的理想选择。」Andes晶心科技董事长暨CEO林志明表示。「我们非常高兴能与普林芯驰合作推出的全新一代端侧AI音频处理器芯片。他们不断与我们合作开发成功的产品，同时还对我们的处理器和开发工具提供有帮助的反馈。我们期待普林芯驰会推出更多基于AndesCore®的产品，持续在智能家居、传统家电、消费电子等领域提供有竞争力的完整解决方案。」

关于珠海普林芯驰科技有限公司

普林芯驰为高新技术企业，广东省博士后创新实践基地，拥有多项发明及实用新型专利。自成立以来，普林芯驰充分以市场需求为导向，基于MCU+智能感知和智能算法核心技术，持续在智能家居、传统家电、消费电子等领域提供有竞争力的完整解决方案。2021年普林芯驰自研的SPT513系列产品已成功打入国内一线品牌供应链，合作伙伴包括小米、荣耀、喜马拉雅、沃尔玛、传音控股等知名品牌，出货量累计已超数千万颗。http://www.spacetouch.co/

关于Andes晶心科技

Andes晶心科技股份有限公司于2005年成立于新竹科学园区，2017年于台湾证交所上市 (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099)。Andes晶心是RISC-V国际协会的创始首席会员，也是第一家推出商用RISC-V矢量处理器的主流CPU供货商。为满足当今电子设备的严格要求，Andes晶心提供可配置性高的32/64位高效能CPU核，包含DSP、FPU、Vector、超标量 (Superscalar)、乱序执行 (Out-of-Order)及多核系列，可应用于各式SoC与应用场景。Andes晶心并提供功能齐全的整合开发环境和全面的软/硬件解决方案，可帮助客户在短时间内创新其SoC设计。截至2022年底，嵌入AndesCore® 的SoC累积总出货量已达120亿颗。更多关于Andes晶心的信息，请参阅晶心官网https://www.andestech.com。订阅晶心微信公众号AndesTech及Bilibili 获得最新消息！

Continue ReadingAndes晶心科技与普林芯驰联手打造高新性端侧AI音频处理器 搭载AndesCore® D25F RISC-V处理器核心

GOWIN Semiconductor & Andes Technology Corp. Announce the First RISC-V CPU and Subsystem Ever Embedded 22nm SoC FPGA

GOWIN Is Offering the Andes A25 RISC-V CPU IP and AE350 Subsystem
As Instantiated Hard Cores in Its GW5AST-138 FPGA

San Jose, CA – Aug. 29, 2023 – Andes Technology Corporation (TWSE: 6533), a leading supplier of high efficiency, low-power 32/64-bit RISC-V processor cores and Founding Premier member of RISC-V International, is thrilled to announce that its AndesCore™ A25 RISC-V CPU IP and AE350 peripheral subsystem is hardened and embedded in the GW5AST-138 FPGA chip from GOWIN Semiconductor, the world’s fastest growing FPGA company. This integration, one of the first complete RISC-V microcontrollers in an FPGA, provides designers the A25 processor power and the peripherals most processors require without consuming any FPGA resources. Thus, the hardware team can populate the FPGA with their value-added design while the software team can concurrently create application code based on the rich RISC-V ecosystem.

“Andes is committed to delivering cutting-edge RISC-V technologies allowing developers to create innovative and efficient solutions. The integration of the A25 RISC-V CPU and AE350 peripheral subsystem as a hard core in GOWIN Semiconductor’s GW5AST-138 FPGA marks a significant milestone in achieving this vision,” said Andes North America VP of Sales, Vivien Lin.  “This represents a significant milestone for the RISC-V architecture as it provides our joint customers a versatile hardware development platform to create, debug, and verify their ultimate SoC design before committing their netlist for silicon fabrication. For customers not requiring an SoC, it will enable a complete RISC-V computer ready to drive their end applications.”

“In the Arora V family, we incorporate the peripherals that a RISC-V CPU typically requires in hard instantiations,” says GOWIN’s Sr. Director of Solution Development, Jim Gao. “We included a fully controllable high-speed SerDes for communication, video aggregation, and AI computing acceleration applications that demand very high data rates. Other instantiated functions include Block RAM modules supporting ECC error correction, high-performance multiple voltage GPIO, and high accuracy clock architecture. These hard functions save the FPGA programmable fabric of up 138K LUT’s for the designers’ unique logic implementation.”

About the RISC-V Based GW5AST-138 FPGA:
The AndesCore™ A25 hard core, running at 400MHz, supports the RISC-V P-extension DSP/SIMD ISA (draft), single- and double-precision floating point and bit-manipulation instructions, and MMU for Linux based applications. The AE350 AXI/AHB-based platform comes with level-one memories, interrupt controller, debug module, AXI and AHB Bus Matrix Controller, AXI-to-AHB Bridge and a collection of fundamental AHB/APB bus IP components pre-integrated together as a system design. DDR3 controller and SPI-Flash controller in the FPGA fabric back up the A25’s 32KByte I-Cache and D-Cache after cache misses. Off chip DDR3 provides data memory, SPI-Flash contains the A25’s instruction memory (codes copied from SPI-Flash into DDR3 and Cache upon boot-up).  Besides hard instantiated functions, the GOWIN GW5AST-138 FPGA fabric affords 138K LUTs for custom design implementation.  GOWIN EDA provides an easy-to-use FPGA hardware development environment for the Arora V.  The environment supports multiple RTL-based programming languages, synthesis, placement and routing, bitstream generation and download, power analysis and in-device logic analyzer.

GOWIN PR

Price & Availability
The GW5AST-138 FPGA with SDK with GOWIN_V1.9.9 Beta-3 will be available August 18 through distribution.

About GOWIN Semiconductor Corp.
Founded in 2014, GOWIN Semiconductor Corp., headquartered with major R&D in China, has the vision to accelerate customer innovation worldwide with our programmable solutions. We focus on optimizing our products and removing barriers for customers using programmable logic devices. Our commitment to technology and quality enables customers to reduce the total cost of ownership from using FPGA on their production boards. Our offerings include a broad portfolio of programmable logic devices, design software, intellectual property (IP) cores, reference designs, and development kits. We strive to serve customers in the consumer, industrial, communication, medical, and automotive markets worldwide.

About Andes Technology
Eighteen years in business and a Founding Premier member of RISC-V International, Andes is a publicly listed company  (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099), a leading supplier of high-performance/ low-power 32/64-bit embedded processor IP solutions, and the driving force in taking RISC-V mainstream. Its V5 RISC-V CPU families range from tiny 32-bit cores to advanced 64-bit Out-of-Order processors with DSP, FPU, Vector, Linux, superscalar, and/or multi/many-core capabilities. By the end of 2022, the cumulative volume of Andes-Embedded™ SoCs has surpassed 12 billion. For more information, please visit https://www.andestech.com. Follow Andes on LinkedIn, Twitter, Bilibili and YouTube! 

Continue ReadingGOWIN Semiconductor & Andes Technology Corp. Announce the First RISC-V CPU and Subsystem Ever Embedded 22nm SoC FPGA

Upgrade to Solid Sands’ Latest SuperTest Version Supports Andes to Its Ambitions for Further Growth in the Automotive Sector

Amsterdam and Hsinchu – 11 May 2023 – Andes Technology Corporation, a leading supplier of high-performance/low-power 32/64-bit embedded processor IP solutions, has upgraded its version of the SuperTest Compiler Test and Validation Suite developed and supplied by Solid Sands.

 

Andes is a founding premier member of RISC-V International and the driving force in taking RISC-V mainstream. Solid Sands, the world-leading provider of testing and qualification technology for compilers and libraries, joined the RISC-V community as a Strategic Member at the end of 2022 and provided Andes with SuperTest Vermeer Update #3 to enable the company to realise its ambitious growth plans in the automotive industry.

Because C++ is capable of satisfying the security, functional safety and behavioural requirements of ISO 26262, it is increasingly used in the automotive sector. A substantial number of image processing, signal processing, and machine learning algorithms used in a vehicle’s advanced driver assistance system (ADAS) are now written in C++. Underlining the strong commitment by Andes to RISC-V technology, the latest SuperTest Vermeer version was considered to be a perfect fit when operating in such a safety-critical industry.

Andes is dedicated to delivering top-notch solutions in both AndesCore™ RISC-V IPs and software development tools. In 2022, Andes made a ground-breaking announcement by unveiling the industry’s first fully compliant with ISO 26262 functional safety standards RISC-V CPU IP, AndesCore™ N25F-SE. In the second half of 2023, Andes plans to introduce its highly anticipated AndesCore™ D25F-SE with DSP extension support. Furthermore, Andes continues to optimize compilers, toolchains, and libraries, while expanding its support for DSP/Vector and NN libraries to ensure exceptional performance right out of the box with Andes RISC-V processors. Andes provides sturdy and superior compilers and toolchains by utilizing several open-source and commercial test suites like the SuperTest.

Marcel Beemster, CTO at Solid Sands, says: “Andes has a very strong foothold in the RISC-V environment and is a forerunner in the widespread use of the technology. The company’s commitment to safety-critical development per se and its ambitions in the automotive sector in particular mean that refreshing with the latest SuperTest Vermeer version is the obvious choice.”

“Andes’ cutting-edge software development tools, like AndeSight IDE, optimizing compilers and compute libraries, help accelerate the completion of highly competitive products,” said Warren Chen, Andes Senior Manager of Technical Marketing. “We appreciate the many essential benefits that SuperTest offers and it made perfect sense for us – as we power forward in the highly demanding and exacting automotive sector – to refresh our SuperTest with the latest Vermeer version.”

About Andes Technology
 Eighteen years in business and a Founding Premier member of RISC-V International, Andes is a publicly listed company (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099) and a leading supplier of high-performance/low-power 32/64-bit embedded processor IP solutions, and the driving force in taking RISC-V mainstream. Andes’ fifth-generation AndeStar™ architecture adopted the RISC-V as the base. Its V5 RISC-V CPU families range from tiny 32-bit cores to advanced 64-bit cores Out of Order multi-cores with DSP, FPU, Vector, Linux, superscalar, and/or multicore capabilities. By the end of 2022, the cumulative volume of Andes-Embedded™ SoCs has surpassed 12 billion. For more information, please visit https://www.andestech.com. Follow Andes
on LinkedIn, Facebook and YouTube! 

Contact:
Andes Technology Corporation
sales@andestech.com

About Solid Sands
 Founded in 2014, Solid Sands is the one-stop shop for C and C++ compiler and library testing, validation and safety services. Solid Sands offers extensive test and validation suites with a unique level of compiler and library test coverage, enabling customers to achieve the software tool quality level demanded by ISO standards. The company’s name combines sand – the world’s most abundant source of silicon – with the solidity and security expected of sector-leading testing and validation technologies. More information on the company’s products and services is available at www.solidsands.nl. You can follow Solid Sands on LinkedIn, Twitter and YouTube.

Media Contact:
Solid Sands B.V.
Marianne Damstra
marianne@solidsands.nl

Continue ReadingUpgrade to Solid Sands’ Latest SuperTest Version Supports Andes to Its Ambitions for Further Growth in the Automotive Sector

Andes晶心科技ANDES RISC-V CON将于五月登场 探讨 RISC-V 技术在AI、车用电子和 Android 应用领域的最新趋势

2022年，内嵌Andes晶心CPU IP的SoC芯片出货量超过20亿颗

承诺将建立RISC-V从入门到高阶的CPU IP完整产品线

 2023年5月8日 — ChatGPT浪潮强势来袭，AI应用风起云涌；同时间，电动车蓬勃发展并改变人们的生活型态；此外，RISC-V技术将扩展至Android系统，开创与x86、arm三足鼎立之势。由此可知，RISC-V开源、精简及可扩充的弹性配置，已被广泛应用于各种领域，正在重塑运算技术的未来。作为RISC-V国际协会创始首席会员及32/64位嵌入式CPU核领导品牌，Andes晶心科技已推出多款RISC-V处理器解决方案，并持续带动全球RISC-V生态系成长。为了进一步推广RISC-V，Andes晶心将分别于5月23日在上海博雅酒店及5月25日于北京丽亭华苑酒店举办年度ANDES RISC-V CON研讨会，以「RISC-V 重塑世界 翻转AI、车用电子、Android芯布局」为主题，介绍改变新兴运算面貌的RISC-V灵活优势，并分享Andes晶心协助RISC-V生态系实现多元应用的创新技术。

根据Gartner 2022之年终报告指出，到2027年底，RISC-V架构的出货量，将占MCU全体出货量的25%。从这份报告，可观察到半导体行业开源架构的显著增长趋势。在2022年，内嵌Andes晶心科技IP的SoC芯片出货量也超过20亿颗，证明Andes持续受到客户的肯定。随着Andes Embedded 的芯片总出货量达 120 亿颗，Andes晶心已成为半导体行业的主要参与者。RISC-V架构的兴起以及Andes此类CPU IP技术公司的成功，将为半导体行业提供更完整的开源解决方案，使得市场上选择增多、提供创新及研发方向，并最终为消费者带来更优质的产品。

为了迎接从终端到云端的新兴RISC-V运算时代，全球科技大厂纷纷拥抱RISC-V，快速壮大的生态阵容，显示出适合人工智能、物联网、服务器、数据中心等多元应用的RISC-V架构逐渐成为业界主流。本次活动邀请到RISC-V国际协会担任开场嘉宾，展示RISC-V 在全球市场的强劲发展势头和潜力。不仅如此，Andes晶心科技林志明董事长亦将以「见证RISC-V 成为产业主流」为题，由技术优势、接受程度、学习狂热、供应链之各阶段导入、生态系成熟、新应用发展等观点，分析RISC-V的市场趋势。而Andes晶心科技林志明董事长与姜新雨市场处副处长则将主持研讨会最后的问与答论坛，进一步解说关于RISC-V的最新技术发展动态。

此外，本次活动将聚焦三个热门应用领域，首先，是RISC-V 新踏入的领域Android，Andes将分享最新的产业状况以及可实现Android/Linux应用处理器的AX60系列超纯量乱序执行多核CPU，并分析未来RISC-V指令架构与IP将如何演进以提供最佳的Android装置性能与安全性；其次，是RISC-V应用方兴未艾的AI领域，除了将概述Andes晶心的人工智能解决方案，包括RISC-V向量处理器 (VPU)、深度学习加速器(AnDLA)，以及Andes RISC-V可扩展人工智能子系统、人工智能软件堆栈和开发工具。第三个主题则是Automotive车用电子，Andes晶心科技在汽车电子领域发表的 AndesCore® N25F-SE，是第一个全面符合 ISO 26262汽车应用功能安全标准要求的 RISC-V 核，本次活动并将讨论功能安全在汽车电子领域的重要性，以及在该领域使用 RISC-V 技术的好处。

RISC-V CON研讨会还邀请到众多RISC-V生态伙伴于当天进行专题演讲或现场展示，包括：包含TEE产品与服务提供商豆荚科技(Beanpod)、人工智能芯片设计公司嘉楠捷思(Canaan)、人工智能芯片供应商后摩智能(Houmo.ai)、高性能嵌入式解决方案领导厂商先楫半导体(HPMicro)、全球半导体及软体设计领导品牌Imagination Technologies、软硬件设计验证解决方案的领导厂商Imperas、加速计算机技术解决方案商澎峰科技(PerfLab)、5G开放式无线存取网络基频半导体公司比科奇(Picocom)、业内知名EDA解决方案专家思尔芯(S2C) 、智能设备安全产品与服务提供商瓶钵科技(TrustKernel) 、汽车总线验证工具和嵌入式软件组件供应商Vector、发布旗下第一款RISC-V SBC–Tinker V的Asus IoT及世界知名的嵌入式安全及软件大厂GreenHills，一同引领RISC-V技术突破与市场趋势。这是一场不容错过的RISC-V盛会，诚挚邀请您前来探索RISC-V的芯趋势和新商机。

活动网页 https://www.andestech.com/Andes_RISC-V_CON_2023_CN/

关于晶心 (About Andes Technology)

Andes Technology晶心科技股份有限公司于2005年成立于新竹科学园区，2017年于台湾证交所上市 (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099) Andes是RISC-V国际协会的创始首席会员，也是第一家采用RISC-V作为其第五代架构AndeStar™基础的主流CPU供货商。为满足当今电子设备的严格要求，Andes提供可配置性高的32/64位高效CPU核，包含DSP、FPU、Vector、超纯量(Superscalar) 、乱序执行 (Out-of-Order)及多核系列，可应用于各式SoC与应用场景。并且Andes提供功能齐全的整合开发环境和全面的软/硬件解决方案，可帮助客户在短时间内创新其SoC设计。在2021年，Andes-Embedded™ SoC的年出货量突破30亿颗；而截至2022年底，嵌入AndesCore® 的SoC累积总出货量已达120亿颗。
更多关于Andes的信息，请参阅晶心官网https://www.andestech.com。订阅晶心微信公众号AndesTech及Bilibili 获得最新消息！

Continue ReadingAndes晶心科技ANDES RISC-V CON将于五月登场 探讨 RISC-V 技术在AI、车用电子和 Android 应用领域的最新趋势

Andes Custom Extension™ (ACE) Supports AndesCore™ 45-Series Processors to Provide Flexible Acceleration

HSINCHU, TAIWAN – March 23, 2023 – Andes Technology, a leading supplier of high-performance, low-power, and extensible 32/64-bit RISC-V processor cores and Founding Premier member of RISC-V International, announces that an updated version of the powerful Andes Custom Extension™ (ACE) technology now supports the AndesCore™ 45-series processors – the single-core N45/D45/NX45/A45/AX45 and the multi-core A45MP/AX45MP. In addition, the advanced ACE features ACE-RVV and Andes Streaming Port will work with the AndesCore™ AX45MPV, which is the latest member of the 45-series processors with up to 1024-bit Vector Processing Unit (VPU).

With an in-order, 8-stage, dual-issue superscalar pipeline, the AndesCore™ 45-series processors offer strong processing performance for companies to develop high-performance solutions for a wide range of applications in 5G, automotive, AIoT etc. Similar to the AndesCore™ 25 and 27-series processors, the 45-series processors now work with the Andes Custom Extension™ (ACE) to realize domain-specific architecture designs with custom instructions support.

Through the ACE framework, SoC designers are able to design custom instructions and the corresponding custom logic to extend the AndesCore™ processors. The Andes COPILOT is a set of powerful tools to generate all the necessary components including intrinsic functions, processor RTL module and support for simulator, debugger, and compilation tools to support the custom instructions. The designers write an ACE script to describe the instruction semantics and concise Verilog RTL code to describe the custom logic. These are then fed into the COPILOT to generate all the outputs. 

The new version COPILOT v6 provides designers access to enhanced features of ACE such as ACE pipelining, background processing, and grouping functions. In the pipelined ACE engine, many ACE instructions are processed in different stages simultaneously. One instruction can complete every cycle when there is no dependence on resources and data. In this way, ACE pipelining offers a significant performance increase. Running ACE instructions in the background decouples their execution from the processor pipeline. This permits the processor pipeline to continue to execute younger instructions, including ACE instructions, without waiting for the completion of older ACE instructions. As a result, overall performance is improved, especially when there are long-latency ACE instructions. Grouping functions allows specifying one or multiple instructions as an instruction group, synchronization group, or a status group. ACE instructions in different instruction groups can be executed simultaneously to improve the overall ACE execution performance.

To further enhance the custom instructions design flexibility, the latest COPILOT has special support for SoC with embedded FPGA, where one or more 45-Series cores are hardened to connect via ACE interfaces to the embedded FPGA, which is ready for post-silicon custom extensions. COPILOT can generate clock domain crossing logic for the hardened part of the chip. The embedded FPGA architecture enables the capability of changing custom instructions for any purpose, such as fixing design issues or adding more innovative instructions.

“Introduction of AndesCore 45-series processors is a major milestone of Andes RISC-V processor development. This class of CPU brings best performance, power efficiency and rich features that our users will value,” said Dr. Charlie Su, President and CTO of Andes Technology. “The 45-series processors are great products in their own right and users can now use the latest ACE to bring a higher degree of customization in their designs.”

The new generation of Andes Custom Extension™ for AndesCore™ 45-series single-core N45/D45/NX45/A45/AX45 and multi-core A45MP/AX45MP is available now. To learn more about ACE’s powerful capabilities, please contact Andes Technology for more information.

About Andes Technology
Eighteen years in business and a Founding Premier member of RISC-V International, Andes is a publicly listed company (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099) and a leading supplier of high-performance/low-power 32/64-bit embedded processor IP solutions, and the driving force in taking RISC-V mainstream. Andes’ fifth-generation AndeStar™ architecture adopted the RISC-V as the base. Its V5 RISC-V CPU families range from tiny 32-bit cores to advanced 64-bit cores Out of Order multi-cores with DSP, FPU, Vector, Linux, superscalar, and/or multicore capabilities. By the end of 2022, the cumulative volume of Andes-Embedded™ SoCs has surpassed 12 billion.

For more information, please visit https://www.andestech.com. Follow Andes on LinkedIn, Facebook and YouTube! 

Contact us
Andes Technology Corporation
sales@andestech.com | +886 3 572 6533

Continue ReadingAndes Custom Extension™ (ACE) Supports AndesCore™ 45-Series Processors to Provide Flexible Acceleration

以坚韧不拔的精神 超群夺目的成绩 Andes晶心科技稳步迈向第十八个年头

【台湾新竹】— 2023年2月22日— Andes Technology晶心科技自2017年上市以来，在CPU IP授权领域获得市场肯定，连续营收六年，屡创新高。尽管面临IP行业和世界经济的快速和动荡变化，2022年Andes晶心仍取得13%的成长，持续在营收上缔创佳绩。这归功于Andes为客户提供之卓越解决方案以及持续耕耘不断扩大的 RISC-V 生态系，让Andes的解决方案可以更简单、更快速的实现。

在2022年，Andes在IP产品布局及业务方面取得显著的进展，累计商业许可协议已超过450份，确立Andes在行业中的领先地位。其主要客户包括联发科技、瑞萨电子、耐能、Picocom、MegaChips、Socionext等世界知名企业集团，以及多家互联网和移动通讯的世界大厂。在2022年，Andes主要的客户应用包括:人工智能、数据中心、FPGA、物联网、MCU、传感器、服务器、触控面板、图像处理及无线设备等项目。

Andes的RISC-V产品线在2022年持续扩增，推出许多令人兴奋的产品，例如全球第一个全面符合ISO 26262标准的RISC-V核心——N25F-SE，以及市场上最强大的RISC-V多核矢量处理器——AX45MPV，可支持 1024 位矢量运算。Andes晶心还推出D23，这是一款入门级的处理器IP，具有低功耗和先进安全的功能，以及 AX60 系列，是一个乱序处理 (out-of-order)超纯量多核处理器家族，其第一个成员是 AX65。而在软件方面，Andes发布AndeSight™ IDE V5.1软件整合开发环境，具有可简化 RISC-V 与异构系统、多核处理器及 AI 系统开发的新功能。

Andes坚持不懈地在全球推广RISC-V，也在RISC-V国际协会中担任重要职务，包括董事会、技术指导委员会、任务组主席和RISC-V大使等单位都可以看到Andes的积极参与，研讨主题范畴涵盖技术到营销。而Andes目前工程师人数达350多位，并仍会持续进行人才招聘，以扩展其在台湾和北美的研发中心。为促进RISC-V的长远发展，Andes 2022年也首次进行专门为大专院校学生举办的晶心杯RISC-V创意大赛，向学术界推广RISC-V的开放创新精神。

Andes凭借其商业上的成功，以及其独特的技术和对行业的贡献，赢得数个重要的奖项。其中包括由 ASPENCORE 媒体集团主办的 2022 WEAA (全球电子成就奖)和 EE Awards Asia (亚洲金选奖)，以及因为向全球客户推广RISC-V有所贡献，而获颁由RISC-V国际协会赠予的RISC-V日本2022产品奖。

即使在全球疫情的挑战下，Andes仍然在世界各地参加超过五十场以上的重要的展会以及发表演说。参与的展览包括AI Hardware Summit, Embedded World, Linley Processor Conference, RISC-V Summit以及TSMC Technology Symposiums等。此外，Andes透过广受好评的演讲、线上研讨会和活动，深入探讨各方面的RISC-V开发项目和主流应用趋势，包括AndesCore® 处理器 IP 的架构及其优势、RISC-V在数据中心加速器和车用认证方面的最新进展等。从RISC-V初学者、爱好者到专家等与会者们，都透过这些演讲了解最新行业的发展。

「Andes在产品设计和协助客户研发的丰富经验能快速提升SoC设计团队将产品推向市场的速度。」Andes董事长暨RISC-V国际协会董事林志明表示，「我们持续致力于开创计算机产业。基于 2022 年的成功，我们期待在2023年为市场带来更令人兴奋的创新解决方案。」

关于晶心 (About Andes Technology)

Andes Technology晶心科技股份有限公司于2005年成立于新竹科学园区，2017年于台湾证交所上市(TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099)。Andes是RISC-V国际协会的创始首席会员，也是第一家采用RISC-V作为其第五代架构AndeStar™基础的主流CPU供货商。为满足当今电子设备的严格要求，Andes提供可配置性高的32/64位高效CPU核，包含DSP、FPU、Vector、超纯量(Superscalar)及多核系列，可应用于各式SoC与应用场景。Andes并提供功能齐全的整合开发环境和全面的软/硬件解决方案，可帮助客户在短时间内创新其SoC设计。在2021年，Andes-Embedded™ SoC的年出货量突破30亿颗；而截至2021年底，嵌入AndesCore® 的SoC累计总出货量已超越100亿颗。

更多关于Andes的信息，请参阅晶心官网https://www.andestech.com。

追踪晶心最新消息：LinkedIn、Facebook、Weibo、Twitter、Bilibili以及YouTube。

晶心科技媒体联系窗口：

林筱瓴

电话：+886-3-6687253 ext.644

hllin@andestech.com

Continue Reading以坚韧不拔的精神 超群夺目的成绩 Andes晶心科技稳步迈向第十八个年头

Andes晶心科技推出功能丰富、低功耗且高度安全的入门级 RISC-V 处理器 AndesCore® D23

D23 透过最新的RISC-V指令集架构提供领先业界的性能 4.13 Coremark/MHz

【台湾新竹】— 2023年2月7日—32/64位、高效能低功耗的RISC-V处理器核心领导供货商暨RISC-V国际协会创始首席会员Andes Technology晶心科技 (TWSE: 6533)，今日公布了新产品AndesCore® D23。这是一个三级流水线的 32 位 RISC-V CPU核心，适合低功耗和高效率的嵌入式处理以及物联网应用。D23以4.13 Coremark/MHz的性能，成为相同等级CPU核心中的领导者；在28纳米的制程下，D23工作频率仍可高达800MHz (worst-case)，最小可用配置为26K 逻辑门数。

「D23是AndesCore®入门级系列的新成员，具有少的逻辑门数 (同时也提供较小的芯片面积)以及非常优异的效能。D23包括单/双精度浮点运算单元 FPU，除了支持RISC-V RV32GC扩展指令集之外，它还支持最近新通过的扩展指令集，例如：位操作 (B)扩展指令集、纯量加密 (K)扩展指令集、缓存管理操作 (CMO) 扩展指令集、程序代码缩减扩展指令集和RISC-V DSP/SIMD (P)扩展指令集 (草稿版本)。搭配使用RISC-V DSP/SIMD (P)扩充指令集 (草稿版本)与效能高度优化的AndeSoft™ NN Library可以帮助客户很有效率地加速AI应用计算。它还配置了核心中断控制器 (CLIC)，可以提供超过 1000个中断服务，以实现快速中断响应、优先级排序和抢占。D23也配置了 Andes 第五代扩展指令集，包括用于硬件堆栈保护的 StackSafe™以及在C扩展指令集之上，用于程序代码压缩的 CoDense™ ，和用于电源管理的 PowerBrake。」Andes晶心科技总经理暨技术长苏泓萌博士提到。「D23也会提供其他进阶功能，包括指令和数据高速缓存、防止内存软差错 (soft error)保护以及Andes Custom Extension™ (Andes晶心客制化扩展指令集)。」

此外，D23 包含许多安全功能，例如增强型和监管模式物理内存保护 (Physical Memory Protection) (ePMP/sPMP)，以加强CPU核心的安全级别。新的纯量加密(K)扩展指令集可提供在加速网络和数据加密的 AES 加密/解密的指令以及用于数字签名和证书的 SHA256/512 指令。D23 也支持 AndeSentry™ 的安全框架，可以与Andes晶心科技的安全合作伙伴进行开放式合作，并提供安全启动/调试以及可信任执行环境 (TEE)等安全解决方案。D23具有强大的安全功能，非常适合Matter (新的物联网标准)。D23设计与其弹性满足了设计人员对于数字信号处理、安全性、芯片功率、面积和性能这些项目的需求。因此，D23适用于智能家电、可穿戴装备、AIoT设备和专用型MCU等多种应用。

AndesCore® D23 将于 2023 年的第一季提供主要功能给早鸟客户，并于第三季提供完整的功能给客户进行评估。关于D23处理器的更多细节，请联系Andes晶心科技业务部门sales@andestech.com。


关于晶心 (About Andes Technology)

Andes Technology晶心科技股份有限公司于2005年成立于新竹科学园区，2017年于台湾证交所上市(TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099)。Andes是RISC-V国际协会的创始首席会员，也是第一家采用RISC-V作为其第五代架构AndeStar™基础的主流CPU供货商。为满足当今电子设备的严格要求，Andes提供可配置性高的32/64位高效CPU核心，包含DSP、FPU、Vector、超纯量(Superscalar)及多核心系列，可应用于各式SoC与应用场景。Andes并提供功能齐全的整合开发环境和全面的软/硬件解决方案，可帮助客户在短时间内创新其SoC设计。在2021年，Andes-Embedded™ SoC的年出货量突破30亿颗；而截至2021年底，嵌入AndesCore® 的SoC累积总出货量已超越100亿颗。

更多关于Andes的信息，请参阅晶心官网https://www.andestech.com。

追踪晶心最新消息：LinkedIn、Facebook、Weibo、Twitter、Bilibili以及YouTube。

晶心科技媒体联系窗口：

林筱瓴

电话：+886-3-6687253 ext.644

hllin@andestech.com

Continue ReadingAndes晶心科技推出功能丰富、低功耗且高度安全的入门级 RISC-V 处理器 AndesCore® D23

Andes晶心科技推出RISC-V超纯量乱序执行多核处理器AndesCore®AX60系列

AX65为AX60系列的第一个成员，基于次世代CPU微架构，提供卓越性能

【加州圣塔芭芭拉】— 2023年1月31日— 32/64位、高效能低功耗的RISC-V处理器核心领导供货商暨RISC-V国际协会创始首席会员Andes Technology晶心科技 (TWSE: 6533)，在2022 年 Linley 秋季处理器大会上，展示了其最新的顶级AndesCore® AX60 系列，该系列是一个功率、面积和效率方面都有极佳表现的乱序执行64位处理器架构。主要是针对需要极高计算量要求的操作系统和应用程序的需求而设计，例如高级驾驶辅助系统 (ADAS)、人工智能 (AI)、增强/虚拟现实 (AR/VR)、数据中心加速器、5G基础设施、高速网络和企业级存储系统等。

AX60 系列的第一个成员– AX65支持RISC-V最新的指令集扩展，例如纯量加密 (scalar cryptography)扩展指令集和位操作 (bit manipulation)扩展指令集。AX65核心是一个具有13级流水线，4路 (4-way)超纯量，乱序 (Out-of-Order )执行的处理器。在TAGE (TAgged GEometric history length)高准确率循环动态分支预测器的协助下，每个频率可有效率地攫取4至8条指令。然后它将多至4条指令同时进行译码、重新命名和发送到8个执行单元，这包括4个整数单元、2个完整的读取/储存单元以及2个浮点运算单元。除了读取/存储单元外，AX65的内存管理单元还包括分别的2级转译后备缓冲区（Translation Lookaside Buffer），具有同时进行多个分页链结表更新查询 (table walkers)和最多可达 64 条执行中的读取/存储指令。

AX65支持多核心集群，其具有高速缓存数据一致性管理 (cache coherence)以扩展其效能。每一个核心都有 64KB 的专用指令和数据缓存控制器。该集群最多可扩充至8个核心，并含有一个集群内一致性管理器 (in-cluster coherence manager)和一个可达 8MB 的共享高速缓存。其IO一致性接口 (IO coherence interface)可让所有 AX65的cache与外部 IO 周边维持一致性，并易于SoC之整合。一致性管理器和共享高速缓存可以与核心异步运行来达到SoC整体性能的优化。此外，AX65支持RISC-V标准的外部除错 (external debug)和指令记录 (instruction trace)接口，方便快速的系统开发、分析和除错。

「经过数百家客户的商业授权以及上百亿颗嵌入AndesCore®的芯片，Andes晶心科技已被证明是值得信赖的处理器IP供货商。我们的使命是持续提供全面而广泛的处理器IP产品，以支持从小型MCU到大型数据中心加速器等一连串的广泛应用，同时提供高效的控制处理功能和强大的计算加速能力，包括运行在裸机、RTOS和Linux等环境。我们很高兴地宣布推出我们的顶级处理器AX60 系列，以进一步扩大我们的产品组合。」Andes晶心科技总经理暨技术长苏泓萌博士指出。「AX65 在大型基准检验中，在相同的频率下，比前一代高端核心AX45高出2倍的性能。此外，它能够在7奈米制程下以 2.5GHz 的频率运行，比AX45高出 25%。凭借性能的大幅跃升，AX65 处理器可满足当前高性能SoC中，各种新兴应用对提高控制处理器性能的需求。」

AndesCore® AX65 将于 2023 年的年中透过优先体验计划提供给特定客户，并于2023年底上市开放对所有客户授权。关于AX65和AX60系列处理器的更多信息，请联系Andes晶心科技。

 

关于晶心 (About Andes Technology)

Andes Technology晶心科技股份有限公司于2005年成立于新竹科学园区，2017年于台湾证交所上市 (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099)。Andes是RISC-V国际协会的创始首席会员，也是第一家采用RISC-V作为其第五代架构AndeStar™基础的主流CPU供货商。为满足当今电子设备的严格要求，Andes提供可配置性高的32/64位高效CPU核心，包含DSP、FPU、Vector、超纯量(Superscalar)及多核心系列，可应用于各式SoC与应用场景。Andes并提供功能齐全的整合开发环境和全面的软/硬件解决方案，可帮助客户在短时间内创新其SoC设计。在2021年，Andes-Embedded™ SoC的年出货量突破30亿颗；而截至2021年底，嵌入AndesCore™ 的SoC累积总出货量已超越100亿颗。

更多关于Andes的信息，请参阅晶心官网https://www.andestech.com。追踪Andes晶心最新消息：LinkedIn、Weibo、Twitter、Bilibili以及YouTube。

 

Andes Technology 晶心科技媒体联系窗口：

林筱瓴

电话：+886-3-6687253 ext.644

hllin@andestech.com

 

Continue ReadingAndes晶心科技推出RISC-V超纯量乱序执行多核处理器AndesCore®AX60系列

Andes Technology Collaborates with LDRA to Deliver Integrated Tool Suite for Safety-Critical Software on Andes RISC-V CPU Solutions

The integration helps developers to develop and manage applications in increasingly complex and safety-critical industries such as aerospace, automotive, railway, industrial, and medical on Andes RISC-V CPU solutions.

BANGALORE – January 19, 2023—Andes Technology (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099), a leading supplier of high efficiency, low-power 32/64-bit RISC-V processor cores and founding premier member of RISC-V International, today announced the integration of AndeSight™ IDE with LDRA tool suite. The integration with LDRA’s comprehensive set of software standards compliance, testing, and verification tools helps developers to develop and manage applications in increasingly complex and safety-critical industries such as aerospace, automotive, railway, industrial, and medical on Andes RISC-V CPU solutions. This compliance results in safer, more secure, more efficient, and more capable software.

As part of the integration, the LDRA tool suite, along with the eclipse plugin, hooks into the AndeSight™ integrated development environment (IDE) to allow compilation, linking, programming, and execution in the AndeSight™ environments. The LDRA tool suite offers the built-in import capability to reduce the static analysis efforts of AndeSight™ project files via included paths, macros, and other settings. In addition, the LDRA tool suite performs dynamic analysis on simulator targets within the AndeSight™ IDE or on the AndeShape™ evaluation boards. This allows users to perform system and unit tests using the already available Andes infrastructure to provide a head start to developers.

The integration with the LDRA tool suite provides the following additional features to the AndeSight™ IDE:

  • Source code static analysis
  • Software dynamic analysis, including modified condition/decision coverage (MC/DC) on the host and target
  • Software unit/integration testing on the host and target
  • Improved code quality, safety, and security
  • Reduced testing time and cost

LDRA Tool Suite Meets TÜV Certification

Functional safety standards consider the increasing use of tools for software application development and explicitly require such tools to be qualified. TÜV SÜD examined the quality and compliance of the software development processes and functional safety management of the LDRA tools to the given standards. TÜV assessed the suitability of the LDRA tools and associated user documentation as capable of supporting developers in safety-critical industries to achieve certification.

AndesCore™ N25F-SE Processor, the World First RISC-V CPU IP with ISO 26262 Full Compliance

The AndesCore™ N25F-SE is a safety-enhanced 32-bit RISC-V CPU core and is certified to be fully compliant with ISO 26262 ASIL B (Automotive Safety Integrity Level B) functional safety standards, including Parts 2, 4, 5, 8, and 9, for the development of automotive applications. The N25F-SE inherits the compact and performant design of the popular N25F. It supports standard IMACFD extensions including efficient integer and floating-point instructions and incorporates the Andes V5 extension instructions to further boost performance and reduce code size. To fully utilize the capabilities of the AndesCore™, the AndeSight™ IDE provides a comprehensive software solution that helps optimize code speed and code size and simplifies the development process by providing application development, debugging, analysis, compute libraries, OS awareness, and multicore development to developers.

“AndesCore™ N25F-SE ASIL B certified processor brings unique and competitive value to our RISC-V customers,” said Warren Chen, Senior Technical Marketing Manager, Andes Technology.  “The exciting partnership with LDRA enables us to bring versatile solutions to the developers for safety-critical applications. We welcome the benefits the LDRA tool suite brings to the RISC-V community in accelerating the functional safety applications development.”

“Designers are currently moving toward real implementations of their RISC-V-based designs within multiple safety-critical industries,” said Ian Hennell, Operations Director, LDRA. “As the focus shifts to a software-driven architecture supported by top-notch analysis tools, the RISC-V software efforts require more than just enabling the existing architecture. With our integration with Andes Technology, developers can meet these requirements while making sure their software is safe and security-driven.”

About LDRA

For more than 45 years, LDRA has developed and driven the market for software that automates code analysis and software testing for safety-, mission-, security-, and business-critical markets. Working with clients to achieve early error identification and elimination, and full compliance with industry standards, LDRA traces requirements through static and dynamic analysis to unit testing and verification for a wide variety of hardware and software platforms. Boasting a worldwide presence, LDRA has headquarters in the United Kingdom, United States, Germany, and India coupled with an extensive distributor network. For more information on the LDRA tool suite, please visit www.ldra.com

About Andes Technology

Eighteen years in business and a Founding Premier member of RISC-V International, Andes is publicly-listed company (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099) and a leading supplier of high-performance/low-power 32/64-bit embedded processor IP solutions, and the driving force in taking RISC-V mainstream. Andes’ fifth-generation AndeStar™ architecture adopted the RISC-V as the base. Its V5 RISC-V CPU families range from tiny 32-bit cores to advanced 64-bit Out-of-Order processors with DSP, FPU, Vector, Linux, superscalar, and/or multi/many-core capabilities. The annual volume of Andes-Embedded SoCs has exceeded 3 billion in 2021 and continues to rise. By the end of 2022, the cumulative volume of Andes-Embedded™ SoCs has surpassed 12 billion. For more information, please visit https://www.andestech.com. Follow Andes on LinkedIn, Facebook, Weibo, Twitter, Bilibili  and YouTube! 

Media contacts:

Andes Technology

Jonah McLeod

Tel: +1 (510) 449-8634 Email: Jonahm@andestech.com

Hsiaoling Lin

Tel: +886-3-5726533 ext.644 Email: hllin@andestech.com

 

LDRA

Mark James

Tel: +44 (0) 151 649 9300, Email: mark.james@ldra.com  

 

HCI Marketing and Communications, Inc.

Kelly Wanlass

Tel: +1 (801) 602-4723, Email: kelly@hci-marketing.com

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