Andes Technology Unveils Andes D23 and N225 Cores Pioneering the Next Generation of Compact, Performant, and Secure RISC-V Processor Technology

Hsinchu, Taiwan – Oct. 17, 2023 – Andes Technology, the renowned supplier of high-efficiency, low-power 32/64-bit RISC-V processor cores and a Founding Premier member of RISC-V International, proudly announces the release of its latest innovation – the AndesCore™ D23 and N225 RISC-V processors. Specifically designed to cater to the dynamic needs of the Internet of Things (IoT) and embedded systems, these cores epitomize Andes’ unwavering commitment to delivering cutting-edge technology for the interconnected world.

The D23 and N225 cores have been meticulously engineered with compactness, performance-efficiency, low-power consumption, flexibility, and security as top priorities. These cores empower IoT and embedded chip and device manufacturers to meet the burgeoning demands of a rapidly evolving market while minimizing power usage and ensuring robust security.

Andes announced the popular N22, a 2-stage pipeline AndesCore implementing RV32I/EMAC ISA back in February 2019, targeting deeply embedded processing and having a performance of 3.95 Coremark/MHz and 1.8 DMIPS/MHz. The D23 and N225 are revamped designs with a new microarchitecture and the latest RISC-V extensions (details below) to offer better performance, smaller code size, and more security support. They provide a good migration path for customers looking to upgrade their N22 designs or kick-off a new design today.

Common Key Features of AndesCore D23 and N225:
Latest RISC-V Extensions Support: The N225 implements the RV32 IMACBZce non-privileged extensions as well as Machine/User modes and Enhanced Physical Memory Protection (ePMP). The D23 additionally supports the FDKP extensions (Single/Double-Precision Floating-Point, Scalar Crypto and Packed SIMD/DSP draft), and CMO (Cache Management Operations) extension. The D23 is also incorporated with Supervisor mode and its associated PMP (sPMP) for higher security.

Compact Size: Both cores feature a highly compact design with a 3-stage pipeline, primarily supporting single instruction issue with some dual-issue capability. This makes them exceptionally well-suited for space- and memory-constrained IoT and embedded applications, including wearables, sensors, and smart home devices.

High Performance: Both cores achieve industry-leading performance in their class, boasting outstanding benchmark scores such as 4.55 (D23) and 4.4 (N225) Coremark/MHz, and 2.08 (D23) and 1.92 (N225) DMIPS/MHz, respectively. They are capable of operating at high frequencies across various technology nodes such as near 800 MHz at 28nm, providing the necessary computing power for edge IoT devices with ever-increasing performance and feature demands.

Power Management: Both cores support advanced power management technologies such as PowerBrake and Wait-For-Interrupt (WFI) and Wait-For-Event (WFE), ensuring prolonged battery life for many types of untethered IoT devices.

Small Code Size: The N22 already offers industry-leading code size with Andes CoDense™ technology. With the addition of the new RISC-V Zce code size reduction extension, the D23 and N225 further reduce 4.4% code size for the Embench-IoT benchmark, compared to the N22. This provides additional memory cost-saving for Andes customers.

Flexibility: Both cores offer extensive configurability, including optimized multipliers for performance or area, optional static or dynamic branch prediction, various combinations of privilege modes, instruction and data Local Memories with sizes from 1 KB to 512 MB, and 2-wire or 4-wire JTAG debug interface. Designers can tailor these features to address their specific application requirements.

Ease of SoC Integration: To simplify integration into System-on-Chip (SoC) designs, both cores support either Core-Local Interrupt Controller (CLIC) for the single-CPU SoC or Platform-level Interrupt Controller (PLIC) for multiple-CPU SoC, rich options for AMBA interfaces, private machine timers or platform machine timers, and instruction trace interfaces.

In addition to the above-mentioned shared features and latest RISC-V extensions, the D23 core boasts additional capabilities, including built-in instruction and data caches, and ECC soft error protection for all cache and local memories. It can also seamlessly integrate with the powerful ACE™ (Andes Custom Extension) to support custom instructions for Domain-Specific Acceleration (DSA) and has a roadmap to include a functional safety derivative. These expanded capabilities open up opportunities for the D23 to serve a wider range of segments in automotive and industrial control applications.

Dr. Charlie Su, President and CTO of Andes Technology, expressed his enthusiasm for the release of these cores, stating, “The D23 and N225 mark a significant milestone in our commitment to providing innovative solutions for the IoT and embedded segments. With their compact design, power efficiency, and robust security features, these cores are poised to set new industry standards. We believe they will empower designers and developers to create cutting-edge products that can thrive in the fast-paced world of IoT.”

The D23/N225 have been licensed out and several companies are actively evaluating them. Their overall features will be developed and delivered in two phases. For more information about these cores, please visit the Andes Technology website.


About Andes Technology
Eighteen years in business and a Founding Premier member of RISC-V International, Andes is a publicly-listed company (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099) and a leading supplier of high-performance/low-power 32/64-bit embedded processor IP solutions, and the driving force in taking RISC-V mainstream. Its V5 RISC-V CPU families range from tiny 32-bit cores to advanced 64-bit Out-of-Order processors with DSP, FPU, Vector, Linux, superscalar, and/or multi/many-core capabilities. By the end of 2022, the cumulative volume of Andes-Embedded™ SoCs has surpassed 12 billion. For more information, please visit https://www.andestech.com. Follow Andes on LinkedIn, Twitter, Bilibili and YouTube! ! 

Continue ReadingAndes Technology Unveils Andes D23 and N225 Cores Pioneering the Next Generation of Compact, Performant, and Secure RISC-V Processor Technology

GOWIN Semiconductor & Andes Technology Corp. Announce the First RISC-V CPU and Subsystem Ever Embedded 22nm SoC FPGA

GOWIN Is Offering the Andes A25 RISC-V CPU IP and AE350 Subsystem
As Instantiated Hard Cores in Its GW5AST-138 FPGA

San Jose, CA – Aug. 29, 2023 – Andes Technology Corporation (TWSE: 6533), a leading supplier of high efficiency, low-power 32/64-bit RISC-V processor cores and Founding Premier member of RISC-V International, is thrilled to announce that its AndesCore™ A25 RISC-V CPU IP and AE350 peripheral subsystem is hardened and embedded in the GW5AST-138 FPGA chip from GOWIN Semiconductor, the world’s fastest growing FPGA company. This integration, one of the first complete RISC-V microcontrollers in an FPGA, provides designers the A25 processor power and the peripherals most processors require without consuming any FPGA resources. Thus, the hardware team can populate the FPGA with their value-added design while the software team can concurrently create application code based on the rich RISC-V ecosystem.

“Andes is committed to delivering cutting-edge RISC-V technologies allowing developers to create innovative and efficient solutions. The integration of the A25 RISC-V CPU and AE350 peripheral subsystem as a hard core in GOWIN Semiconductor’s GW5AST-138 FPGA marks a significant milestone in achieving this vision,” said Andes North America VP of Sales, Vivien Lin.  “This represents a significant milestone for the RISC-V architecture as it provides our joint customers a versatile hardware development platform to create, debug, and verify their ultimate SoC design before committing their netlist for silicon fabrication. For customers not requiring an SoC, it will enable a complete RISC-V computer ready to drive their end applications.”

“In the Arora V family, we incorporate the peripherals that a RISC-V CPU typically requires in hard instantiations,” says GOWIN’s Sr. Director of Solution Development, Jim Gao. “We included a fully controllable high-speed SerDes for communication, video aggregation, and AI computing acceleration applications that demand very high data rates. Other instantiated functions include Block RAM modules supporting ECC error correction, high-performance multiple voltage GPIO, and high accuracy clock architecture. These hard functions save the FPGA programmable fabric of up 138K LUT’s for the designers’ unique logic implementation.”

About the RISC-V Based GW5AST-138 FPGA:
The AndesCore™ A25 hard core, running at 400MHz, supports the RISC-V P-extension DSP/SIMD ISA (draft), single- and double-precision floating point and bit-manipulation instructions, and MMU for Linux based applications. The AE350 AXI/AHB-based platform comes with level-one memories, interrupt controller, debug module, AXI and AHB Bus Matrix Controller, AXI-to-AHB Bridge and a collection of fundamental AHB/APB bus IP components pre-integrated together as a system design. DDR3 controller and SPI-Flash controller in the FPGA fabric back up the A25’s 32KByte I-Cache and D-Cache after cache misses. Off chip DDR3 provides data memory, SPI-Flash contains the A25’s instruction memory (codes copied from SPI-Flash into DDR3 and Cache upon boot-up).  Besides hard instantiated functions, the GOWIN GW5AST-138 FPGA fabric affords 138K LUTs for custom design implementation.  GOWIN EDA provides an easy-to-use FPGA hardware development environment for the Arora V.  The environment supports multiple RTL-based programming languages, synthesis, placement and routing, bitstream generation and download, power analysis and in-device logic analyzer.

GOWIN PR

Price & Availability
The GW5AST-138 FPGA with SDK with GOWIN_V1.9.9 Beta-3 will be available August 18 through distribution.

About GOWIN Semiconductor Corp.
Founded in 2014, GOWIN Semiconductor Corp., headquartered with major R&D in China, has the vision to accelerate customer innovation worldwide with our programmable solutions. We focus on optimizing our products and removing barriers for customers using programmable logic devices. Our commitment to technology and quality enables customers to reduce the total cost of ownership from using FPGA on their production boards. Our offerings include a broad portfolio of programmable logic devices, design software, intellectual property (IP) cores, reference designs, and development kits. We strive to serve customers in the consumer, industrial, communication, medical, and automotive markets worldwide.

About Andes Technology
Eighteen years in business and a Founding Premier member of RISC-V International, Andes is a publicly listed company  (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099), a leading supplier of high-performance/ low-power 32/64-bit embedded processor IP solutions, and the driving force in taking RISC-V mainstream. Its V5 RISC-V CPU families range from tiny 32-bit cores to advanced 64-bit Out-of-Order processors with DSP, FPU, Vector, Linux, superscalar, and/or multi/many-core capabilities. By the end of 2022, the cumulative volume of Andes-Embedded™ SoCs has surpassed 12 billion. For more information, please visit https://www.andestech.com. Follow Andes on LinkedIn, Twitter, Bilibili and YouTube! 

Continue ReadingGOWIN Semiconductor & Andes Technology Corp. Announce the First RISC-V CPU and Subsystem Ever Embedded 22nm SoC FPGA

Andes晶心科技N25F RISC-V处理器协助驱动群联电子X1企业级SSD控制芯片 共同打造卓越性能低功耗的存储解决方案

69

2023年8月17日—32/64位、高效能低功耗的RISC-V处理器核心领导供货商暨RISC-V国际协会创始首席会员Andes晶心科技（TWSE: 6533）和全球领先NAND闪存控制芯片和存储解决方案的供货商群联电子（TPEX: 8299）今日共同宣布：群联电子屡获殊荣的PCIe Gen4x4 SSD控制芯片X1 （PS5020-E20），即采用Andes晶心科技的AndesCore® N25F处理器。高速且精简的 N25F 在性能、面积和功耗之间取得了良好的平衡，因此可广泛应用于对效能要求较高的嵌入式控制器SoC 中。

AndesCore® N25F 是一款基于 AndeStar™ V5 架构的 32 位 CPU IP 核，在RISC-V架构的基础上进行了扩展并保持了兼容性。它采用经过优化的五级流水线设计，可以提供领先的每兆赫兹 (per-MHz)性能，并具有出色的效率。此外，N25F具有许多选配功能，例如指令和数据快取、低延迟的区域内存以及用于保护第一级（L1）内存出现软件错误的ECC。为了支持灵活的SoC结构，N25F可配置为AXI 64 位或 AHB 64/32 位总线接口，还有一个可用于从外部直接读/写本地内存的端口，以确保内存存取的速度和安全性。此外，Andes Custom Extension™ （ACE）可通过自定义特殊用途指令提供额外的灵活性。综合上述，凭借其丰富的功能和客制化选项，N25F在嵌入式控制器市场上非常受欢迎。

群联X1 SSD平台是一款针对企业级SSD市场的U.3 PCIe 4.0 x4 NVMe SSD存储方案。它在随机读取IOPS速度方面的大幅提升，使其非常适用于处理数千个客户端的人工智能训练和应用服务器。X1平台提供了更高的速度和更低的功耗，以具有成本效益的解决方案消除了性能瓶颈，显著提高了服务质量（QoS），并为关键商务应用提供了最高水平的数据完整性和安全性。该产品最近还荣获了2023年台湾精品奖。

「从Andes晶心科技之前的V3架构到基于RISC-V的V5架构，双方的合作已经持续了近十年。Andes提供的处理器有许多选配功能，而Andes Custom Extension™ （ACE）自动化工具非常强大，可以根据我们确切的需求客制化指令。」群联研发副总郑国义说道。「我们很高兴能与Andes晶心科技合作。通过晶心科技提供的处理器和技术支持，相信两家公司在未来会有更多合作的机会。」

「Andes晶心科技的AndesCore® N25F提供了高效的性能和灵活的配置，使其成为高性能嵌入式控制器的理想选择。事实上，N25F一直是最畅销的RISC-V核。」Andes晶心科技总经理暨技术长苏泓萌博士说道。「我们非常感谢能与群联合作许多项目。群联是一个理想的客户，他们不断与我们合作开发成功的产品，同时还对我们的处理器和开发工具提供了有帮助的反馈。我们已经将合作扩展至超标量D45核心，并期待群联会推出更多基于AndesCore®的产品。」

【关于迈向安全: ANDES RISC-V 车规应用研讨会】
汽车电子产业快速发展，其安全性也日益重要。为促进RISC-V生态系发展及车规级SOC芯片需求，Andes晶心将携手HPMicro、芯科集成、SGS- TÜV SAAR、IAR、VECTOR、豆荚、瓶钵、兆松等合作伙伴共同举办线下车规应用研讨会，与观众分享全方位的RISC-V汽车电子相关技术与测试标准介绍，并解析Andes ISO 26262 ASIL-D多款车用处理器以及支持RISC-V架构的功能安全软件和工具等，协助您加速车用SOC设计，迈向车用安全之路。

我们诚挚邀请您前来参加本次迈向安全: ANDES RISC-V 车规应用研讨会，并与现场贵宾进行经验分享与对话交流。议程及更多信息请参阅活动官网: http://www.andestech.com/cn/2023_automotive_roadshow_cn/

立即报名

关于群联
群联电子股份有限公司（TPEX: 8299）是全球领先的NAND闪存控制器IC和存储解决方案提供商。我们提供多种服务，包括控制器设计、系统整合、IP授权和全方位的完整解决方案，涵盖SSD（PCIe/SATA/PATA）、eMMC、UFS、SD和USB界面等应用领域，面向消费者、工业和企业市场。作为产业协会的积极成员，群联是SDA、ONFI、UFSA的董事会成员，同时也是JEDEC、PCI-SIG、MIPI、NVMe和IEEE-SA的贡献者。 

关于Andes晶心科技
晶心科技股份有限公司于2005年成立于新竹科学园区，2017年于台湾证交所上市 (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099)。Andes晶心是RISC-V国际协会的创始首席会员，也是第一家推出商用RISC-V向量处理器的主流CPU供货商。为满足当今电子设备的严格要求，Andes晶心提供可配置性高的32/64位高效能CPU核，包含DSP、FPU、Vector、超标量 (Superscalar)、乱序执行 (Out-of-Order)及多核系列，可应用于各式SoC与应用场景。Andes晶心并提供功能齐全的整合开发环境和全面的软/硬件解决方案，可帮助客户在短时间内创新其SoC设计。截至2022年底，嵌入AndesCore® 的SoC累积总出货量已达120亿颗。更多关于Andes晶心的信息，请参阅晶心官网https://www.andestech.com。订阅晶心微信公众号AndesTech及Bilibili 获得最新消息！

Continue ReadingAndes晶心科技N25F RISC-V处理器协助驱动群联电子X1企业级SSD控制芯片 共同打造卓越性能低功耗的存储解决方案

兆松科技 ZCC 工具链全面支持 Andes晶心科技 RISC-V 处理器

2023年7月31日 — 芯片软硬件协同设计解决方案服务提供商兆松科技（Terapines Technology），宣布兆松科技的 ZCC 工具链全面支持Andes晶心科技（Andes Technology; TWSE: 6533）全系列的 RISC-V 处理器。ZCC工具链目前在嵌入式、高性能、AI芯片等多个领域的表现都处于国际领先水平。Andes晶心科技是32及64位高效能、低功耗RISC-V处理器核心领导供货商、RISC-V国际协会（RISC-V International）的创始首席会员，也是将RISC-V推向主流的主导力量。近日，兆松科技也正式加入RISC-V International，成为其战略会员。ZCC全面支持AndeStar™ V5指令集，意味着Andes晶心科技及其合作伙伴可以在V5架构的 RISC-V CPU产品中使用ZCC工具链以达到更高代码密度和性能，从而满足更加广泛的应用需求。

ZCC工具链相较晶心科技AndeSight™ IDE 所提供的LLVM编译器，可以进一步将AndesCore® AX45 双发射8级流水线处理器CoreMark分数提升6%，在Embench-IoT（-O3）测试中同时实现了18.9%的性能提升和11.8%的代码密度优化；在Embench-IoT（-Os）测试同时实现了10%的代码密度优化和9.1%的性能提升。

根据SPECInt2006动态指令数测试结果，相较开源LLVM 16.0，ZCC针对RISC-V RV64GCBV处理器的优化减少指令数30%，针对RISC-V RV64GCB处理器的优化减少指令数13%；

根据典型AI算子动态指令数结果，兆松科技ZCC工具链自动向量化性能相较于开源编译器最高提升91倍，意味着ZCC工具链可以为AI芯片的开发带来前所未有的优势。相较手写算子库，在保证性能的同时，可以大幅度降低维护成本。

兆松科技CTO伍华林表示，「兆松科技从ZCC工具链全面支持AndeStar™ V5的指令集作为起点，将逐步和晶心科技建立更进一步的合作，除了从工具链的代码密度和性能等优势上，帮助AndesCore™ RISC-V CPU IP更具有竞争力，未来还将提供软硬件协同设计工具，虚拟模型性能仿真工具等，帮助晶心科技的客户，高效的设计出有竞争力的芯片。」

「很高兴看到兆松科技与晶心科技合作协助我们的共同客户，大幅优化发挥出RISC-V处理器的效能, 同时进一步缩减代码。」晶心科技总经理暨技术长苏泓萌博士表示，「RISC-V技术持续快速发展，我们期许持续拓展生态系为客户提供专业开发工具的支持，进一步保障客户的产品效能与竞争力。」

关于兆松科技
兆松科技（武汉）有限公司成立于2019年底，以编译器和仿真器为核心技术，是国内鲜有的软硬件协同设计基础软件公司。兆松科技产品和解决方案覆盖软硬件协同设计、车规安全检测工具、DSA及嵌入式开发工具、ROS操作系统四大领域。欢迎关注兆松科技官网https://www.terapines.com及微信公众号。

关于Andes晶心科技
晶心科技股份有限公司于2005年成立于新竹科学园区，2017年于台湾证交所上市 (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099)。晶心是RISC-V国际协会的创始首席会员，也是第一家推出商用RISC-V向量处理器的主流CPU供货商。为满足当今电子设备的严格要求，晶心提供可配置性高的32/64位高效能CPU核，包含DSP、FPU、Vector、超标量 (Superscalar)、乱序执行 (Out-of-Order)及多核系列，可应用于各式SoC与应用场景。晶心并提供功能齐全的整合开发环境和全面的软/硬件解决方案，可帮助客户在短时间内创新其SoC设计。截至2022年底，嵌入AndesCore™ 的SoC累积总出货量已达120亿颗。更多关于晶心的信息，请参阅晶心官网https://www.andestech.com。追踪晶心最新消息：LinkedIn、Twitter、Bilibili以及Wechat 公众号AndesTech。

Andes Technology Corporation

Andes Technology (Wuhan) Corporation
No.999 Gaoxin Avenue, Donghu New Technology Development Zone, Wuhan, Hubei, China, 430223

Andes Shanghai Technology Corporation
Room 303A, No. 500, Bibo Road, China (Shanghai) Pilot Free Trade Zone, 201203
Tel: +86-021-50310722

North China

Tel ：+86-13510313727
         +86 13121206255
Business : sales.bj@andestech.com
Technical : support.bj@andestech.com

Central China

Tel: +86-13681862493
Business : sales.wh@andestech.com
Technical : support.wh@andestech.com

South China

Tel：+86-13510313727

Business：sales.hn@andestech.com

Technical：support.hn@andestech.com

Hong Kong

Tel : +852-5609-1047
Business : sales.hk@andestech.com
Technical : support.hk@andestech.com

Continue Reading兆松科技 ZCC 工具链全面支持 Andes晶心科技 RISC-V 处理器

工业物联网首选！华硕发布首款RISC-V单板计算机Tinker V

【台湾台北】— 2023年6月13日—华硕智能物联网（ASUS IoT）今推出Tinker V多功能单板计算机（SBC, Single Board Computer），搭载64位RISC-V处理器，并支持Linux Debian和Yocto操作系统；小巧的Pico-ITX尺寸亦整合丰富的端口，加上长期供应及可靠支持，绝对是物联网和网关应用的理想首选！

开源CPU架构 使用更弹性多元
RISC-V处理器采用精简指令集（RISC）原则的开源指令集架构（ISA），与传统的x86和Arm平台相比，其决定性优势在于ISA的开源特性，企业可在RISC-V架构下自由修改并优化（IC架构）。随着RISC-V架构的Tinker V问世，也意味着华硕智能物联网持续精益求精，加速相关领域的技术研发与创新，为世界各地人们提供更便利高效的生活环境。

工业物联网的上上之选
全新Tinker V搭载瑞萨电子（Renesas）的RZ/Five MPU微处理器，以及Andes晶心科技的RISC-V AndesCore® AX45MP单核心，可支持1.0 GHz的操作频率，另具备广泛的工业用途外围设备，包括：GPIO、micro-USB、双Gigabit以太网络，一对控制器局域网络接口和两个RS232 COM端口，同时还配置1GB内建内存，可选配的16GB eMMC，并能承受-20°C到60°C的宽温。

强强连手 茁壮RISC-V生态系
针对Tinker V的推出，瑞萨电子（Renesas）企业基础设施业务部副总加藤茂树表示，「我们很高兴与华硕合作，并一起见证我们的通用RZ/Five MPU微处理器如何为RISC-V在物联网系统中的拓展做出贡献。期待通过此次合作为客户带来更全面的基于RISC-V的MPU解决方案。」

Andes晶心科技总经理暨技术长苏泓萌博士也表示，「Andes晶心科技与华硕智能物联网携手推出了令人为之振奋的Tinker V，这款功能强大的单板计算机采用Andes AX45MP单核心，希望未来在全球工业市场创新者的装置中，能看到更多嵌入Andes晶心先进的RISC-V处理器系列。」

所有购买Tinker V的用户，除享有华硕智能物联网五年的产品保证，还可获得专业完善的技术支持，以缩短开发周期、加速应用部署，使用安心有保障！

关于华硕
身为全球科技领导品牌，华硕致力打造最别出心裁、直觉易用的产品与解决方案，为世人开创无与伦比的应用体验，擘划美好数字生活蓝图。华硕拥有近五千名世界级研发菁英团队，以进化式创新构筑明日科技蓝图闻名，平均每天获得超过11个质量、创新与设计奖项，更受美国《财富》杂志评选为「世界最受推崇企业」之一。

关于晶心科技 (About Andes Technology)
Andes晶心科技股份有限公司于2005年成立于新竹科学园区，2017年于台湾证交所上市 (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099)。Andes晶心是RISC-V国际协会的创始首席会员，也是第一家推出商用RISC-V矢量处理器的主流CPU供货商。为满足当今电子设备的严格要求，Andes晶心提供可配置性高的32/64位高效能CPU核，包含DSP、FPU、Vector、超标量 (Superscalar)、乱序执行 (Out-of-Order)及多核系列，可应用于各式SoC与应用场景。Andes晶心并提供功能齐全的整合开发环境和全面的软/硬件解决方案，可帮助客户在短时间内创新其SoC设计。截至2022年底，嵌入AndesCore® 的SoC累积总出货量已达120亿颗。更多关于Andes晶心的信息，请参阅晶心官网https://www.andestech.com。订阅晶心微信公众号AndesTech及Bilibili 获得最新消息！

Continue Reading工业物联网首选！华硕发布首款RISC-V单板计算机Tinker V

Andes晶心科技推出全新产品线AndesAIRE™ 对边缘与终端设备人工智能推理提供极高效率解决方案

【台湾新竹】— 2023 年 5 月 15日 —32/64位、高效能低功耗的RISC-V处理器核心领导供货商暨RISC-V国际协会创始首席会员Andes晶心科技今日宣布全新产品线 AndesAIRE™ 或 Andes AI Runs Everywhere 正式上市，该解决方案为边缘及终端设备人工智能推理提供极高的计算效率。AndesAIRE™ 包含首代人工智能和机器学习（AI/ML）硬件加速器IP AndesAIRE™ AnDLA™ I350（Andes Deep Learning Accelerator），以及神经网络软件开发工具包 AndesAIRE™ NN SDK。

随着人工智能和机器学习（AI/ML）应用的爆炸性成长，高效能与高效率深度学习解决方案的需求不断增加。在此需求下，由于边缘和终端运作环境严格的功耗限制，使得仅仅依赖CPU架构变得困难。针对这样特别的挑战，Andes晶心科技推出AndesAIRE™ AnDLA™ I350，提供行业领先的高效率、低功耗和小面积，非常适合广泛应用于边缘推理应用，包括智能物联网设备和智能相机，到智能家电和机器人等应用。

AndesAIRE™ AnDLA™ I350 建立在Andes晶心科技过去18年来CPU 技术中累积的计算加速经验，并提供了一个高效能的AI/ML加速平台。该解决方案支持主流的深度学习框架，例如 TensorFlow Lite、PyTorch 和 ONNX，以及在 int8 数据类型中执行多种神经网络算子，例如convolution, fully-connect, element-wise, activation, pooling, channel padding, upsample, concatenation等。此外，AnDLA™ I350 内部设备直接内存访问（DMA）和本地内存（local memory），以发挥硬件计算引擎的最佳计算能力。而operator fusion技术也是其特色之一，能更有效地执行常见的计算序列。AnDLA™ I350主要可配置参数包括从 32 到 4096 MAC 计算能力， 16KB 到 4MB 的SRAM 大小，为广泛的应用提供64 GOPS 到 8 TOPS（在1 GHz下）灵活计算能力。

AndesAIRE™ NN SDK 是一套全面的软件开发工具包，可用于端到端（end-to-end）的开发与部署。它包括以下部分：

  • AndesAIRE™ NNPilot™: 神经网络优化工具套件
  • AndesAIRE™ TFLM for AnDLA™：专为 AnDLA™ 优化的TensorFlow Lite for Microcontrollers框架
  • AnDLA™ driver and runtime
  • NNPilot™ 可自动分析输入的神经网络模型，进行模型剪枝（pruning）和模型量化（quantization），根据硬件配置产生 AnDLA™ 可执行文件，并于 TFLM 框架下进行模型推论。
  • NNPilot™ 还会生成样本 C 代码，在主机的裸机环境中调用 AnDLA™ 驱动程序。

为因应不断进展与快速发展的人工智能技术，Andes晶心科技致力于开发可扩展的人工智能子系统，能完美结合AndesAIRE™ AnDLA™、AndesCore® RISC-V CPU和Andes Custom Extension™ （ACE）。在此子系统中，人工智能工作负载中大部分结构化与计算耗时的部分将有效率地在 AnDLA™ 中计算，而如非线性函数等较不结构化的计算可以通过RISC-V DSP/SIMD或Vector指令扩展的处理器中进行计算。其中ACE 是 CPU 和 AnDLA™ 之间进行高效数据传输的重要关键，能减少海量存储器带宽和功耗，并同时大幅提高硬件利用率。ACE 还可以针对特定领域计算设计客制化指令，例如数据的前与后处理，来进一步提升处理效能。除了硬件IP 的可扩展性外，Andes晶心科技不断投入开发软件 AndesAIRE™ NN SDK 和 AndesAIRE™ NN Library，使得已量产的SoCs可以因应未来人工智能算法的演进。自 2021 年以来，Andes晶心科技每年于其计算函式库中增加了超过一百个函数，并且将持续优化和扩展新功能到 NN SDK 和 NN library 中。

「Andes晶心科技非常高兴推出我们人工智能和机器学习（AI/ML）解决方案的新产品系列，包括AndesAIRE™ AnDLA™ I350和AndesAIRE™ NN SDK。这是一款包含杰出效能的硬件以及专为边缘和端点人工智能推理设计的端到端软件解决方案，」Andes晶心科技总经理暨技术长苏泓萌博士表示。「透过AndesAIRE™，我们赋予开发人员和创新者打造高扩展性和面向未来的AI/ML的芯片和应用。」

「AndesAIRE™ 产品线展现了我们对于AI/ML的市场愿景。」 Andes晶心科技市场处资深技术经理王庭昭表示，「透过融合 RISC-V 处理器、AnDLA™ 和 ACE 的优势而成的一个人工智能子系统，可充分平衡效能、功耗和面积，提供客户极具竞争力的解决方案。不仅如此，RISC-V 处理器和 NN 软件栈确保了弹性，而丰富的扩展性也让客户为其AI/ML特定应用建立出独特的价值。」 

AndesAIRE™ AnDLA™ I350和AndesAIRE™ NN SDK现在正开放早鸟授权项目。欲获得更多信息，请访问Andes晶心科技网站：http://www.andestech.com/en/products-solutions/andesaire-ai/。

【关于Andes RISC-V CON】

Andes晶心科技年度RISC-V技术论坛，2023年场次包括5/16于新竹国宾饭店，5/23于上海博雅酒店，5/25于北京丽亭华苑酒店等地线下举办。本年以“RISC-V重塑世界， 翻转AI、车用电子、ANDROID战略布局”为题。介绍改变新兴运算面貌的RISC-V灵活优势，并分享晶心协助RISC-V生态系实现多元应用的创新技术。本次活动将聚焦三个热门应用领域，包括人工智能、车规电子以及RISC-V新踏入的Android领域，并邀请到众多RISC-V生态伙伴进行专题演讲及现场展示。免费报名及议程请参阅活动官网:
5/16(二)新竹场 https://www.andestech.com/Andes_RISC-V_CON_2023_TW/。
5/23(二)上海场、5/25(四)北京场 https://www.andestech.com/Andes_RISC-V_CON_2023_CN/。

Continue ReadingAndes晶心科技推出全新产品线AndesAIRE™ 对边缘与终端设备人工智能推理提供极高效率解决方案

Upgrade to Solid Sands’ Latest SuperTest Version Supports Andes to Its Ambitions for Further Growth in the Automotive Sector

Amsterdam and Hsinchu – 11 May 2023 – Andes Technology Corporation, a leading supplier of high-performance/low-power 32/64-bit embedded processor IP solutions, has upgraded its version of the SuperTest Compiler Test and Validation Suite developed and supplied by Solid Sands.

 

Andes is a founding premier member of RISC-V International and the driving force in taking RISC-V mainstream. Solid Sands, the world-leading provider of testing and qualification technology for compilers and libraries, joined the RISC-V community as a Strategic Member at the end of 2022 and provided Andes with SuperTest Vermeer Update #3 to enable the company to realise its ambitious growth plans in the automotive industry.

Because C++ is capable of satisfying the security, functional safety and behavioural requirements of ISO 26262, it is increasingly used in the automotive sector. A substantial number of image processing, signal processing, and machine learning algorithms used in a vehicle’s advanced driver assistance system (ADAS) are now written in C++. Underlining the strong commitment by Andes to RISC-V technology, the latest SuperTest Vermeer version was considered to be a perfect fit when operating in such a safety-critical industry.

Andes is dedicated to delivering top-notch solutions in both AndesCore™ RISC-V IPs and software development tools. In 2022, Andes made a ground-breaking announcement by unveiling the industry’s first fully compliant with ISO 26262 functional safety standards RISC-V CPU IP, AndesCore™ N25F-SE. In the second half of 2023, Andes plans to introduce its highly anticipated AndesCore™ D25F-SE with DSP extension support. Furthermore, Andes continues to optimize compilers, toolchains, and libraries, while expanding its support for DSP/Vector and NN libraries to ensure exceptional performance right out of the box with Andes RISC-V processors. Andes provides sturdy and superior compilers and toolchains by utilizing several open-source and commercial test suites like the SuperTest.

Marcel Beemster, CTO at Solid Sands, says: “Andes has a very strong foothold in the RISC-V environment and is a forerunner in the widespread use of the technology. The company’s commitment to safety-critical development per se and its ambitions in the automotive sector in particular mean that refreshing with the latest SuperTest Vermeer version is the obvious choice.”

“Andes’ cutting-edge software development tools, like AndeSight IDE, optimizing compilers and compute libraries, help accelerate the completion of highly competitive products,” said Warren Chen, Andes Senior Manager of Technical Marketing. “We appreciate the many essential benefits that SuperTest offers and it made perfect sense for us – as we power forward in the highly demanding and exacting automotive sector – to refresh our SuperTest with the latest Vermeer version.”

About Andes Technology
 Eighteen years in business and a Founding Premier member of RISC-V International, Andes is a publicly listed company (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099) and a leading supplier of high-performance/low-power 32/64-bit embedded processor IP solutions, and the driving force in taking RISC-V mainstream. Andes’ fifth-generation AndeStar™ architecture adopted the RISC-V as the base. Its V5 RISC-V CPU families range from tiny 32-bit cores to advanced 64-bit cores Out of Order multi-cores with DSP, FPU, Vector, Linux, superscalar, and/or multicore capabilities. By the end of 2022, the cumulative volume of Andes-Embedded™ SoCs has surpassed 12 billion. For more information, please visit https://www.andestech.com. Follow Andes
on LinkedIn, Facebook and YouTube! 

Contact:
Andes Technology Corporation
sales@andestech.com

About Solid Sands
 Founded in 2014, Solid Sands is the one-stop shop for C and C++ compiler and library testing, validation and safety services. Solid Sands offers extensive test and validation suites with a unique level of compiler and library test coverage, enabling customers to achieve the software tool quality level demanded by ISO standards. The company’s name combines sand – the world’s most abundant source of silicon – with the solidity and security expected of sector-leading testing and validation technologies. More information on the company’s products and services is available at www.solidsands.nl. You can follow Solid Sands on LinkedIn, Twitter and YouTube.

Media Contact:
Solid Sands B.V.
Marianne Damstra
marianne@solidsands.nl

Continue ReadingUpgrade to Solid Sands’ Latest SuperTest Version Supports Andes to Its Ambitions for Further Growth in the Automotive Sector

Andes晶心科技ANDES RISC-V CON将于五月登场 探讨 RISC-V 技术在AI、车用电子和 Android 应用领域的最新趋势

2022年，内嵌Andes晶心CPU IP的SoC芯片出货量超过20亿颗

承诺将建立RISC-V从入门到高阶的CPU IP完整产品线

 2023年5月8日 — ChatGPT浪潮强势来袭，AI应用风起云涌；同时间，电动车蓬勃发展并改变人们的生活型态；此外，RISC-V技术将扩展至Android系统，开创与x86、arm三足鼎立之势。由此可知，RISC-V开源、精简及可扩充的弹性配置，已被广泛应用于各种领域，正在重塑运算技术的未来。作为RISC-V国际协会创始首席会员及32/64位嵌入式CPU核领导品牌，Andes晶心科技已推出多款RISC-V处理器解决方案，并持续带动全球RISC-V生态系成长。为了进一步推广RISC-V，Andes晶心将分别于5月23日在上海博雅酒店及5月25日于北京丽亭华苑酒店举办年度ANDES RISC-V CON研讨会，以「RISC-V 重塑世界 翻转AI、车用电子、Android芯布局」为主题，介绍改变新兴运算面貌的RISC-V灵活优势，并分享Andes晶心协助RISC-V生态系实现多元应用的创新技术。

根据Gartner 2022之年终报告指出，到2027年底，RISC-V架构的出货量，将占MCU全体出货量的25%。从这份报告，可观察到半导体行业开源架构的显著增长趋势。在2022年，内嵌Andes晶心科技IP的SoC芯片出货量也超过20亿颗，证明Andes持续受到客户的肯定。随着Andes Embedded 的芯片总出货量达 120 亿颗，Andes晶心已成为半导体行业的主要参与者。RISC-V架构的兴起以及Andes此类CPU IP技术公司的成功，将为半导体行业提供更完整的开源解决方案，使得市场上选择增多、提供创新及研发方向，并最终为消费者带来更优质的产品。

为了迎接从终端到云端的新兴RISC-V运算时代，全球科技大厂纷纷拥抱RISC-V，快速壮大的生态阵容，显示出适合人工智能、物联网、服务器、数据中心等多元应用的RISC-V架构逐渐成为业界主流。本次活动邀请到RISC-V国际协会担任开场嘉宾，展示RISC-V 在全球市场的强劲发展势头和潜力。不仅如此，Andes晶心科技林志明董事长亦将以「见证RISC-V 成为产业主流」为题，由技术优势、接受程度、学习狂热、供应链之各阶段导入、生态系成熟、新应用发展等观点，分析RISC-V的市场趋势。而Andes晶心科技林志明董事长与姜新雨市场处副处长则将主持研讨会最后的问与答论坛，进一步解说关于RISC-V的最新技术发展动态。

此外，本次活动将聚焦三个热门应用领域，首先，是RISC-V 新踏入的领域Android，Andes将分享最新的产业状况以及可实现Android/Linux应用处理器的AX60系列超纯量乱序执行多核CPU，并分析未来RISC-V指令架构与IP将如何演进以提供最佳的Android装置性能与安全性；其次，是RISC-V应用方兴未艾的AI领域，除了将概述Andes晶心的人工智能解决方案，包括RISC-V向量处理器 (VPU)、深度学习加速器(AnDLA)，以及Andes RISC-V可扩展人工智能子系统、人工智能软件堆栈和开发工具。第三个主题则是Automotive车用电子，Andes晶心科技在汽车电子领域发表的 AndesCore® N25F-SE，是第一个全面符合 ISO 26262汽车应用功能安全标准要求的 RISC-V 核，本次活动并将讨论功能安全在汽车电子领域的重要性，以及在该领域使用 RISC-V 技术的好处。

RISC-V CON研讨会还邀请到众多RISC-V生态伙伴于当天进行专题演讲或现场展示，包括：包含TEE产品与服务提供商豆荚科技(Beanpod)、人工智能芯片设计公司嘉楠捷思(Canaan)、人工智能芯片供应商后摩智能(Houmo.ai)、高性能嵌入式解决方案领导厂商先楫半导体(HPMicro)、全球半导体及软体设计领导品牌Imagination Technologies、软硬件设计验证解决方案的领导厂商Imperas、加速计算机技术解决方案商澎峰科技(PerfLab)、5G开放式无线存取网络基频半导体公司比科奇(Picocom)、业内知名EDA解决方案专家思尔芯(S2C) 、智能设备安全产品与服务提供商瓶钵科技(TrustKernel) 、汽车总线验证工具和嵌入式软件组件供应商Vector、发布旗下第一款RISC-V SBC–Tinker V的Asus IoT及世界知名的嵌入式安全及软件大厂GreenHills，一同引领RISC-V技术突破与市场趋势。这是一场不容错过的RISC-V盛会，诚挚邀请您前来探索RISC-V的芯趋势和新商机。

活动网页 https://www.andestech.com/Andes_RISC-V_CON_2023_CN/

关于晶心 (About Andes Technology)

Andes Technology晶心科技股份有限公司于2005年成立于新竹科学园区，2017年于台湾证交所上市 (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099) Andes是RISC-V国际协会的创始首席会员，也是第一家采用RISC-V作为其第五代架构AndeStar™基础的主流CPU供货商。为满足当今电子设备的严格要求，Andes提供可配置性高的32/64位高效CPU核，包含DSP、FPU、Vector、超纯量(Superscalar) 、乱序执行 (Out-of-Order)及多核系列，可应用于各式SoC与应用场景。并且Andes提供功能齐全的整合开发环境和全面的软/硬件解决方案，可帮助客户在短时间内创新其SoC设计。在2021年，Andes-Embedded™ SoC的年出货量突破30亿颗；而截至2022年底，嵌入AndesCore® 的SoC累积总出货量已达120亿颗。
更多关于Andes的信息，请参阅晶心官网https://www.andestech.com。订阅晶心微信公众号AndesTech及Bilibili 获得最新消息！

Continue ReadingAndes晶心科技ANDES RISC-V CON将于五月登场 探讨 RISC-V 技术在AI、车用电子和 Android 应用领域的最新趋势

晶心科技和 IAR 携手助力奕力科技加速开发其符合ISO 26262标准的 TDDI SoC ILI6600A

透过晶心科技与 IAR的整合功能安全解决方案，协助奕力科技开发其高性能的触控与显示驱动整合（TDDI）芯片

【台湾新竹 】— 2023 年 4 月 20日 — Andes Technology晶心科技（TWSE: 6533）和 IAR 共同宣布，奕力科技（ILITEK）的触控与显示驱动器整合（TDDI）芯片— ILI6600A ，采用Andes晶心科技通过 ISO 26262 道路车辆功能安全国际标准认证的 V5 RISC-V CPU 核心 — N25F-SE ，以及 IAR 经过认证的 Embedded Workbench for RISC-V 工具链，以支持在其最先进的芯片中实现汽车功能安全(FuSa)。ILI6600A由一个高度集成的非晶/LTPS（低温多晶硅）/氧化物 TFT（薄膜晶体管） LCD（液晶显示屏） 驱动器，和一个内嵌式触控控制器构成。透过由Andes晶心科技及IAR提供符合ISO 26262严谨设计方法的整合解决方案，能缩短车规产品严格的认证流程，并加速客户产品上市时间。

ILI6600A 的 LCD 驱动器支持多达 3 个芯片级联，并提供高达 16.7M 的颜色数量。其 IIE（真彩图像增强）功能可以实现高质量的显示和视觉体验。ILI6600A 的触控面板控制器采用 32 位高性能单周期指令集 MCU，其内置的高速和高性能硬件加速计算模块提供了卓越的数据处理能力。凭借奕力科技的驱动技术和算法，触控控制器为用户带来了出色的性能体验、强大的抗噪能力和高信噪比。

ILI6600A 采用了 AndesCore® N25F-SE，这是全球首款全面符合ISO 26262 标准的 RISC-V CPU。作为备受欢迎的同系列产品N25F之强化安全功能版，N25F-SE 是专为汽车功能安全(Automotive Functional Safety) 所设计，可防止系统性失效和随机硬件失效的发生。IAR Embedded Workbench for RISC-V 是一个经过认证的集成开发环境，内含强大的 IAR C/C++ 编译程序和调试器。两家公司的联合解决方案和专业知识为客户提供了一流的汽车应用性能和安全性。

奕力科技执行长魏伦武表示：「ILI6600A 是我们第一款符合ISO 26262 ASIL B标准的产品，能够提供强大、实时、经过认证的故障检测功能。其较高的信噪比实现了优异的触控屏性能，可带来一流的用户体验。同时，我们的工程资源将提供及时的现场服务 。此外，ILI6600A 还拥有依托于我们为 TDDI 项目积累的经验而开发的远程 AI 调谐工具。我们很高兴与Andes和 IAR 合作开发我们的汽车 TDDI SoC 解决方案，以满足对具有更高分辨率的车载显示设备日益增长的需求。ILI6600A AFE 可以扫描高达 960ch 的触控传感器，并支持 LongV 和 LongH 两种扫描方式。此外，ILI6600A 还支持虚拟触控键和旋钮功能。作为汽车应用中最重要的部分，ILI6600A 已经通过了汽车 ESD、EMI 和 EMS 测试，且很快就会成为 AEC-Q100 2 级合规产品。Andes晶心的 RISC-V N25F-SE 具有高性能、低功耗和必要的安全功能等优点，是帮助 ILI6600A 实现其设计目标的理想处理器。」

「我们很高兴与 IAR 合作，共同支持奕力科技的车规等级 TDDI SoC 产品开发。通过 N25F-SE，我们让客户在其产品认证过程中，能充分利用到我们ISO 26262认证的CPU IP安全解决方案。奕力科技早前已获得多款Andes自有第三代架构 V3 CPU的授权。他们持续获取晶心科技最新的RISC-V CPU IP授权并将其设计到自己的 SoC 中，充分说明奕力科技对Andes多代 CPU 质量的认可。」Andes晶心科技总经理暨技术长苏泓萌博士表示：「Andes晶心科技是第一家获得 ISO 26262 认证的 RISC-V CPU IP 公司。我们的车规处理器核心开发流程已符合 ISO 26262 标准之最高ASIL D等级要求。随着通过认证之开发流程到位，我们已经有完整的ISO 26262 功能安全系列产品路线图以支持汽车产业供应链的发展。」

IAR 技术长 Anders Holmberg 表示：「IAR 很高兴能与Andes合作来帮助奕力科技确保其 TDDI 产品的功能安全。RISC-V 技术将继续快速向前发展，为创新开辟新天地。我们将通过专业的开发工具支持生态系统和客户，继续推动行业变革。」

IAR Embedded Workbench for RISC-V 的功能安全版通过了 TÜV SÜD 的认证，符合10个不同标准的要求，包括 ISO 26262。除了强大的技术，IAR 还为售出的版本提供有保障的支持，包括长期客户支持合同、验证服务包以及对已知漏洞和问题的定期报告。


关于晶心科技
晶心科技股份有限公司于2005年成立于新竹科学园区，2017年于台湾证交所上市(TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099)。Andes晶心是RISC-V国际协会的创始首席会员，也是第一家采用RISC-V作为其第五代架构AndeStar™基础的主流CPU供货商。为满足当今电子设备的严格要求，Andes晶心提供可配置性高的32/64位高效CPU核心，包含DSP、FPU、Vector、超纯量(Superscalar)、乱序处理(Out-of-order)及多核系列，可应用于各式SoC与应用场景。Andes晶心并提供功能齐全的整合开发环境和全面的软/硬件解决方案，可帮助客户在短时间内创新其SoC设计。2021年，Andes-Embedded™ SoC的年出货量突破30亿颗；而截至2022年底，嵌入AndesCore™ 的SoC累积总出货量已超越120亿颗。

关于奕力科技
奕力科技成立于2004年11月，为专业的面板驱动与触控IC设计公司，拥有显示与触控两项核心技术，多年来专注于面板显示器与触控相关技术之整合，2017年成功结合两项技术推出一系列整合型TDDI产品后，近年来营业额以年复合成长率40%大幅超越同业，市占率达到全球第2名，现为台湾前五大IC设计公司且为全球知名品牌的重要供货商。

关于 IAR
IAR 为嵌入式开发提供世界领先的软件和服务，促使世界各地的公司创造满足当前需求和未来趋势的创新产品。自 1983 年以来，IAR 的解决方案已经辅助了超过一百万个嵌入式应用的开发，保证了其质量、可靠性和效率。公司总部位于瑞典乌普萨拉，并在世界各地设有销售和支持办事处。目前，IAR Systems Group AB 在纳斯达克 OMX 斯德哥尔摩交易所上市，属于中型股指数。如需了解详情，请访问 www.iar.com。

媒体联系窗口:
Andes Technology 晶心科技
林筱瓴, Press Contact, Andes Technology:
Tel: +886-35726533     

E-mail: hllin@andestech.com

IAR
Hanna Laurentz, Head of Corporate Communications, IAR
Tel: +46 18 16 78 00     

E-mail: hanna.laurentz@iar.com 

ILI Technology Corp. 奕力科技
Bert Chang, Product/Sales Manager, ILI Technology Corp.
Tel : +886-911-425656   

E-mail : bert_chang@ilitek.com

Continue Reading晶心科技和 IAR 携手助力奕力科技加速开发其符合ISO 26262标准的 TDDI SoC ILI6600A

Andes Custom Extension™ (ACE) Supports AndesCore™ 45-Series Processors to Provide Flexible Acceleration

HSINCHU, TAIWAN – March 23, 2023 – Andes Technology, a leading supplier of high-performance, low-power, and extensible 32/64-bit RISC-V processor cores and Founding Premier member of RISC-V International, announces that an updated version of the powerful Andes Custom Extension™ (ACE) technology now supports the AndesCore™ 45-series processors – the single-core N45/D45/NX45/A45/AX45 and the multi-core A45MP/AX45MP. In addition, the advanced ACE features ACE-RVV and Andes Streaming Port will work with the AndesCore™ AX45MPV, which is the latest member of the 45-series processors with up to 1024-bit Vector Processing Unit (VPU).

With an in-order, 8-stage, dual-issue superscalar pipeline, the AndesCore™ 45-series processors offer strong processing performance for companies to develop high-performance solutions for a wide range of applications in 5G, automotive, AIoT etc. Similar to the AndesCore™ 25 and 27-series processors, the 45-series processors now work with the Andes Custom Extension™ (ACE) to realize domain-specific architecture designs with custom instructions support.

Through the ACE framework, SoC designers are able to design custom instructions and the corresponding custom logic to extend the AndesCore™ processors. The Andes COPILOT is a set of powerful tools to generate all the necessary components including intrinsic functions, processor RTL module and support for simulator, debugger, and compilation tools to support the custom instructions. The designers write an ACE script to describe the instruction semantics and concise Verilog RTL code to describe the custom logic. These are then fed into the COPILOT to generate all the outputs. 

The new version COPILOT v6 provides designers access to enhanced features of ACE such as ACE pipelining, background processing, and grouping functions. In the pipelined ACE engine, many ACE instructions are processed in different stages simultaneously. One instruction can complete every cycle when there is no dependence on resources and data. In this way, ACE pipelining offers a significant performance increase. Running ACE instructions in the background decouples their execution from the processor pipeline. This permits the processor pipeline to continue to execute younger instructions, including ACE instructions, without waiting for the completion of older ACE instructions. As a result, overall performance is improved, especially when there are long-latency ACE instructions. Grouping functions allows specifying one or multiple instructions as an instruction group, synchronization group, or a status group. ACE instructions in different instruction groups can be executed simultaneously to improve the overall ACE execution performance.

To further enhance the custom instructions design flexibility, the latest COPILOT has special support for SoC with embedded FPGA, where one or more 45-Series cores are hardened to connect via ACE interfaces to the embedded FPGA, which is ready for post-silicon custom extensions. COPILOT can generate clock domain crossing logic for the hardened part of the chip. The embedded FPGA architecture enables the capability of changing custom instructions for any purpose, such as fixing design issues or adding more innovative instructions.

“Introduction of AndesCore 45-series processors is a major milestone of Andes RISC-V processor development. This class of CPU brings best performance, power efficiency and rich features that our users will value,” said Dr. Charlie Su, President and CTO of Andes Technology. “The 45-series processors are great products in their own right and users can now use the latest ACE to bring a higher degree of customization in their designs.”

The new generation of Andes Custom Extension™ for AndesCore™ 45-series single-core N45/D45/NX45/A45/AX45 and multi-core A45MP/AX45MP is available now. To learn more about ACE’s powerful capabilities, please contact Andes Technology for more information.

About Andes Technology
Eighteen years in business and a Founding Premier member of RISC-V International, Andes is a publicly listed company (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099) and a leading supplier of high-performance/low-power 32/64-bit embedded processor IP solutions, and the driving force in taking RISC-V mainstream. Andes’ fifth-generation AndeStar™ architecture adopted the RISC-V as the base. Its V5 RISC-V CPU families range from tiny 32-bit cores to advanced 64-bit cores Out of Order multi-cores with DSP, FPU, Vector, Linux, superscalar, and/or multicore capabilities. By the end of 2022, the cumulative volume of Andes-Embedded™ SoCs has surpassed 12 billion.

For more information, please visit https://www.andestech.com. Follow Andes on LinkedIn, Facebook and YouTube! 

Contact us
Andes Technology Corporation
sales@andestech.com | +886 3 572 6533

Continue ReadingAndes Custom Extension™ (ACE) Supports AndesCore™ 45-Series Processors to Provide Flexible Acceleration