AndesBoardFarm提供SoC工程师透过远程在线FPGA开发板探索RISC-V处理器

【台湾新竹】—2021年10月21日—32及64位高效能、低功耗RISC-V处理器核心领导供货商、RISC-V国际协会(RISC-V International)创始首席会员晶心科技(TWSE: 6533),于今日宣布推出「AndesBoardFarm」,一个可以提供SoC设计人员从自己的计算机远程取得晶心FPGA开发板及管理软件的系列工具,让他们能立即体验开发AndesCore® RISC-V处理器。藉由使用晶心所提供的全面整合开发环境AndeSight™,设计人员可以透过网络以晶心最新的CPU核心运行他们的软件,进行性能测试并直接获得结果;同时,还可以探索晶心所提供的各种软硬件的功能。工程师善用AndesBoardFarm的服务,将大幅减少评估RISC-V处理器的时间和精力,为他们的SoC选择最佳的RISC-V CPU核心。

“创建一个具备复杂功能的多核心RISC-V SoC,并同时开发应用程序来完全利用硬件功能是一项高挑战的任务,”晶心科技总经理暨技术长苏泓萌博士说。“面对日趋复杂的设计和需求快速变化所带来的挑战,要做出决定并确保对其开发项目最有利的IP极需远见。为了协助SoC设计团队能从其自身的角度及需求,找到最适合的AndesCore™,晶心科技建立了一系列FPGA开发板,将之连接到具备网络安全保护的服务器群,并同时运行安全管理软件。客户可以申请账号并将他们的设计及程序上传到AndesBoardFarm网站的开发板上,节省精力并确认他们的设计需求。”

AndesBoardFarm FPGA开发板系列包含所有的晶心RISC-V处理器解决方案,做为嵌入式SoC设计的参考,包括32位及64位单核或多核的处理器,以及其他功能选项,例如用于Linux操作系统的MMU、用于多媒体处理的SIMD指令以及用于AI与其他需要大量数据和复杂计算的向量扩充指令集。如果需要更多详细信息,请联系sales@andestech.com。

关于晶心科技
晶心科技股份有限公司于2005年成立于新竹科学园区2017年于台湾证交所上市(TWSE: 6533)。晶心是RISC-V国际协会(RISC-V International)的创始首席会员,也是第一家采用RISC-V作为其第五代架构AndeStar™基础的主流CPU供货商。为了满足当今电子设备的苛刻要求,晶心提供了可配置性高的32/64位高效CPU核心,包含DSPFPUVector、超纯量(Superscalar)及多核心系列,可应用于各式SoC与应用场景。晶心并提供功能齐全的整合开发环境和全面的软/硬件解决方案,可帮助客户在短时间内创新其SoC设计。2020Andes-Embedded™ SoC的年出货量突破20亿颗,而截至2020年,嵌入AndesCore™SoC累积出货量已超过70亿颗。

 

关于晶心RISC-V AndesCore™系列
晶心科技全面的RISC-V CPU系列涵盖了入门级32N22、中阶32N25F/D25F/A25/A2764NX25F/AX25/AX27以及高阶多核A(X)25MP和向量处理器NX27V,以及近期推出的最新超纯量45系列。关于更多晶心科技的信息,欢迎参阅晶心科技官网
http://www.andestech.com/,并追踪晶心科技官方微信公眾AndesTech微博bilibiliLinkedIn

Continue ReadingAndesBoardFarm提供SoC工程师透过远程在线FPGA开发板探索RISC-V处理器

Andes Technology USA Corp. Announces Major Expansion of Its U.S. Operation

Company Announces Job Openings for San Jose Headquarters and Portland R&D Office

San Jose, California October 8, 2021 – Andes Technology USA Corp., the headquarters of North America operations of Hsinchu, Taiwan-based Andes Technology Corporation, a leading supplier of high efficiency, low-power 32/64-bit RISC-V processor cores and founding premier member of RISC-V International, today announced a major expansion of Its U.S. operation. Andes Technology USA is greatly increasing engineering headcount in both the San Jose, California headquarters and its Portland, Oregon research and development facility. Andes Technology USA is seeking engineers in the U.S. and Canada to work remotely or in the Portland or San Jose offices. Openings are available for design engineers, verification engineers, and field application engineers.

Andes Technology USA Corp. was established in 2015 as a California corporation coincident with Andes Technology Corp. joining RISC-V International. After Andes took the RISC-V instruction set architecture (ISA) as the base to form its fifth generation architecture, AndeStar™ V5 and started developing V5 processor IP’s, the U.S. operation was formed to be nearby early customer adopters of the new ISA. The U.S. subsidiary established an R&D lab shortly thereafter and began developing architectures for the high-end RISC-V processors. In under a year the investment together with the main engineering team in Taiwan yielded the first commercial RISC-V Vector processor IP which won nearly 10 projects including datacenter projects from a large OEM so far.

“Major semiconductor companies worldwide adopting the RISC-V ISA and the RISC-V International work groups rapid development of the RISC-V ISA extensions is driving demand for engineers to keep up with the fast pace of new technology development,” said Emerson Hsiao, Andes Technology USA Corp. Chief Operating Officer. “RISC-V customers like the growing number of extensions coming available as well as their ability to customize the architecture to better fit their processing requirements. Our tool Andes Custom Extensions (ACE) makes the customization process easier and less risky. To keep up with RISC-V technical developments and to serve our customers’ requests, we expect to greatly expand the size of our U.S. operation.”

Engineers interested in Andes are encouraged to view the open positions on the Andes Technology LinkedIn page.

 

About Andes Technology USA Corp.
Andes Technology USA Corp. was formed as a California corporation in 2015 in San Jose California to develop high-end CPU architectures. Emerson Hsiao, Chief Operating Officer heads the office, located in the heart of Silicon Valley in San Jose. In June 2018, the U.S. operation added its R&D facility in Portland, Oregon to attract engineers in the Pacific Northwest and Canada. To date, the U.S. operation continues to develop new high-end CPU processor architecture. Its most significant achievement is the development of the first RISC-V vector architecture based on the RISC-V International RVV specification. Andes developed the first RISC-V vector architecture based on version V0.8 of the specification and has advanced it to the latest to-be-ratified version.

About Andes Technology
Sixteen years in business and a Founding Premier member of RISC-V International, Andes is a leading supplier of high-performance/low-power 32/64-bit embedded processor IP solutions, and a main force to take RISC-V mainstream. Andes’ fifth-generation architecture AndeStar™ adopted the RISC-V as the base. Its V5 RISC-V CPU families range from tiny 32-bit cores to advanced 64-bit cores with DSP, FPU, Vector, Linux, superscalar, and/or multicore capabilities. The annual volume of Andes-Embedded SoCs has exceeded 2 billion since 2020 and continues to rise. To the end of 2020, the cumulative volume of Andes-Embedded™ SoCs has surpassed 7 billion.

About RISC-V AndesCore™
Andes Technology’s comprehensive CPU includes entry-level, mid-range, high-end, extensible and security families to address the full range of embedded electronics products, especially for connected, smart and green applications. From 2017, Andes expands its product line to RISC-V processors and provides a total solution in V5 family cores, including N22, N25F/NX25F, D25F, A25/AX25, A25MP/AX25MP, A27/AX27/NX27V, A45/D45/N45, AX45/DX45/NX45 and A45MP/AX45MP.

For more information, please visit https://www.andestech.com. Follow Andes on LinkedIn, Twitter, Facebook, and YouTube!

Contact Information
Andes Technology –  hr@andestech.com

Continue ReadingAndes Technology USA Corp. Announces Major Expansion of Its U.S. Operation

晶心科顺利发行海外存托凭证 完成首次于卢森堡发行GDR募资 并发表积极成长计划

【台湾新竹】─ 2021年10月7日─ RISC-V 中央处理器硅智财供货商晶心科 (6533-TW) 今 (7) 日宣布,已于9月13日顺利完成海外存托凭证 (GDR) 发行,于卢森堡证交所挂牌上市,新发行之海外存托凭证每单位表彰普通股 2 股,以31.78美元,折算约为每股新台币 440 元,共发行 400 万单位,相当于普通股 800万股,海外募得之总金额约为1.27亿美元(折合为新台币35.17亿元)。晶心科是目前唯一发行GDR募资的RISC-V CPU IP供货商,而响应本次募资之持有者主要为海外机构投资人,以长期持有为投资策略。

晶心科董事长林志明表示,本次募资的最主要目的是充实中长期营运资金,投资研发,健全产品线布局,加重发展高阶技术产品,同时也能使全球投资人能一起分享RISC-V快速成长之市场。本次募得之资金主要将运用于加速扩大产品设计中心规模,除强化现有RISC-V产品的领先外,更将因应市场急需RISC-V高阶运算的解决方案,加速研发高价值之高阶RISC-V CPU IP,以及整合系统芯片之软硬件开发平台。台湾及美、加之设计中心计划于分阶段于3-5年内,招募二百位研发人才,投入开发RISC-V 下一世代之产品,以抢占高价之高阶多核CPU IP市场,增加销售动能,应用领域包括5G、人工智能/机器学习、HPC、ADAS、车用电子、AR/VR、区块链、云端运算、数据中心、服务器、物联网、MCU、储存装置、安防、无线装置等大量及高速运算之市场。

根据晶心科公布2021年上半年财报数据显示,2021上半年之较去年同期成长72.6%,其中63%之营收皆来自RISC-V,包括标准IP授权及客制运算业务,而晶心也分别以2019及2020两年营收总成长率(对比2018)将近100%的成绩,连续进入天下2020、2021之「快速成长一百强」榜单。此外,根据Counterpoint Research最新调查报告指出,随着半导体解决方案中所需之IP技术要求更多元,纯IP供货商之市场将以年复合成长率11%的持续扩大,于2025年达到86亿美元的市场规模。而RISC-V因其开源优势、极佳的功耗比、高安全性及低政治风险等因素,在IP授权市场中具有强劲成长之优势,预计在2025年将于IoT应用、工业应用、车用等三大产业中,成长至分别占28%、12%、10%的市场占有率,成为应用的关键领域,这些都是晶心市场扩大的有利发展因素。

晶心科技总经理暨技术长苏泓萌博士表示,晶心的产品虽是硬件IP (Intellectual Property 智能财产授权),但和软件公司一样,研发人力就是脑力密集的生产线。晶心成立以来持续投入大量研发资源,专注于处理器IP系列产品的开发,这是支持晶心近年来营收屡创新高的最主要原因。为保持同样增长动能,晶心将加速招募更多全球人才投入研发,在现有产品基础上,创造具高价值优势之高阶产品,满足市场对RISC-V 高阶运算产品的需求,以期与市场共同成长。

展望未来十年,越来越多的国际大厂加入RISC-V阵营,扩大RISC-V市场及应用。晶心决心将继续强化技术领先者的地位,并基于多年协助客户导入各式产品量产之丰富经验,于未来RISC-V CPU IP市场,帮助更多RISC-V SoC设计团队推出产品,以实现高幅度的营收成长及获利。

RISC-V demand 

关于晶心科技
晶心科技股份有限公司于2005年成立于新竹科学园区,2017年于台湾证交所上市(TWSE:6533)。晶心是RISC-V国际协会的创始首席会员,也是第一家采用RISC-V作为其第五代架构AndeStar™基础的主流CPU供货商。为了满足当今电子设备的苛刻要求,晶心提供了可配置性高的32/64位高效CPU核心,包含DSP,FPU,Vector,超纯量(Superscalar)及多核心系列,可应用于各式SoC与应用场景。晶心并提供功能齐全的整合开发环境和全面的软/硬件解决方案,可帮助客户在短时间内创新其SoC设计。在2020年,Andes-Embedded™ SoC的年出货量突破20亿颗,而截至2020年底,嵌入AndesCore™的SoC累积总出货量已超过70亿颗。
更多关于晶心的信息,请参阅晶心官网https://www.andestech.com。追踪晶心最新消息:LinkedInFacebookWeiboTwitterBilibili以及YouTube

Continue Reading晶心科顺利发行海外存托凭证 完成首次于卢森堡发行GDR募资 并发表积极成长计划

Menta和晶心科技宣布建立合作关系 使硬件扩充指令集架构可重新配置

【法国苏菲亚科学园区】─2021年9月23日─ eFPGA(嵌入式FPGA)解决方案的领先供货商Menta S.A.S与32/64位RISC-V嵌入式处理器核心领导供货商暨RISC-V国际协会(RISC-V International)创始首席会员晶心科技于今日宣布IP的技术合作。

晶心科技与Menta合作让晶心RISC-V AndesCore™系列可透过eFPGA达到嵌入式可程序逻辑控制(embedded programmable logic)。Menta和晶心科技的合作将能为客户提供联合解决方案,在制造后的SoC里新增客制化扩展指令,为目标应用达到倍数的加速效果。

下一代处理器最主要的差异化因素是能够自定义扩充的指令。RISC-V AndesCore™全面支持在RTL阶段扩充指令,而和eFPGA搭配使用则可在SoC制造后,再根据最终应用扩充指令。设计人员可以在RISC-V规范规格下,为想要加速的应用程序增加所需的任何指令。如此强大的功能,既不会破坏任何软件的兼容性,还能为开发和差异化保留发展空间。

“Menta很荣幸能与晶心科技建立密切的合作关系,“Menta首席执行官Vincent Markus表示。”创新的RISC-V指令集架构(ISA)技术拥有开源、精简、模块化和可扩展的设计,非常适合Menta eFPGA产品线的策略。”

eFPGA的角色是RISC-V CPU硬件扩充核心的一部份,它开启了产品在生命周期内,增加或重新配置指令集架构(ISA)的可能性。晶心RISC-V处理器系列已在SoC市场成为主流的计算引擎,现在透过支持eFPGA硬件的扩展,增强客制化产品ACE (Andes Custom Extension™)的功能。

ACE是一个能在晶心RISC-V处理器核心上定义新指令的强大架构。透过ACE的简易脚本程序来描述指令的输入输出和功能,以及使用ACE的精简Verilog来定义指令在RTL层级的实现方式。SoC设计人员可以轻松运用晶心自定义指令的开发工具COPILOT(Custom-OPtimized Instruction deveLOpment Tools),根据上述的设计资料,自动生成扩展晶心处理器所需的所有新组件,包括处理器的RTL、编译工具、调试器、整合开发环境和近精确周期(near cycle-accurate)的仿真器,以支持客制化新指令并实现加速特定领域的应用。

“透过与Menta的合作,晶心科技能为市场带来全新的CPU核心的应用方式,将更加支持RISC-V生态系的可扩展性,尤其是在强烈需要建立差异化的应用中,例如人工智能以及 5G,”晶心科技总经理暨首席技术官苏泓萌博士表示。“客户可以在芯片制造完成后,通过使用Menta eFPGA的解决方案,重新配置ACE的自定义指令,从而在预期成本内优化并强化他们的硬件。”

Menta的预编程序eFPGA核心与晶心RISC-V CPU核心相结合,将提供专门的用户界面及工具,可以在完整和优化的软件解决方案中,对eFPGA矩阵进行设定,并设定RISC-V应用中可编程的参数。

关于晶心科技
晶心科技股份有限公司于2005年成立于新竹科学园区,2017年于台湾证交所上市(TWSE:6533)。晶心是RISC-V国际协会的创始首席会员,也是第一家采用RISC-V作为其第五代架构AndeStar™基础的主流CPU供货商。为了满足当今电子设备的苛刻要求,晶心提供了可配置性高的32/64位高效CPU核心,包含DSP,FPU,Vector,超标量(Superscalar)及多核系列,可应用于各式SoC与应用场景。并且晶心提供功能齐全的整合开发环境和全面的软/硬件解决方案,可帮助客户在短时间内更新其SoC设计。在2020年,Andes-Embedded™ SoC的年出货量突破20亿颗,而截至2020年底,嵌入AndesCore™的SoC累积总出货量已超过70亿颗。
更多关于晶心的信息,请参阅晶心官网 https://www.andestech.com。追踪晶心最新消息:微信公众号WeiboBilibiliLinkedIn以及Twitter

关于Menta
Menta是一家位于法国苏菲亚科学园区的私人控股公司。对于讲求效率、希望产品在第一次设计就正确及可快速投入量产的ASIC和SoC设计人员而言,Menta是经过验证的eFPGA领先供货商,其设计能适应标准的单元架构(cell-based architecture),加上最先进的工具集,可以为SoC设计带来最高等级的客制化、高标准的测试性和最快的量产时间,并且应用于所有代工厂的任一制程。更多有关Menta的信息,请前往公司网站:www.menta-efpga.com。

Continue ReadingMenta和晶心科技宣布建立合作关系 使硬件扩充指令集架构可重新配置

Andes Technology Corp. Brings Its Broad Family of RISC-V CPU IP to the Silicon Catalyst Semiconductor Incubator

Hsinchu, Taiwan and Silicon Valley, CA – September 8, 2021  Andes Technology Corporation (TWSE: 6533), a leading supplier of high efficiency, low-power 32/64-bit RISC-V processor cores and Founding Premier member of RISC-V International, today announced that it has joined Silicon Catalyst’s In-Kind Partner program. Andes Technology will make available a wide range of its RISC-V processors to startups participating in the Silicon Catalyst incubator program.

These include all Andes RISC-V offerings between the smallest N22 to its multicore 5-stage pipeline 25 and 27 families with P extension, floating point, L2 cache controller and memory management unit. Incubator startups will also have access to Andes’ AE250 Pre-integrated AHB platform, AE350 Pre-integrated AXI platform, and AndeSight Eclipse-based Integrated Development Environment.

“Andes has been helping a steady stream of new design starts to incorporate our wide range of RISC-V AndesCore™ processors,” said Dr. Charlie Su, President and CTO of Andes Technology. “Silicon start-ups such as those in the Silicon Catalyst incubator program are ideal examples of the new ventures. Many have great products on papers but need the IP and tools to lift their design from the page and implement it in silicon. The Silicon Catalyst incubator and Andes provide them the perfect environment and high efficiency RISC-V CPU IPs to achieve this goal. We are delighted to be part of this endeavor.”

“We applaud Andes’ initiative in expanding the reach and visibility of the RISC-V ISA,” said Calista Redmond, CEO of RISC-V International. “As an open computing platform, the continued growth and adoption of RISC-V depends on a broad ecosystem of hardware and software tools and IP. Andes contributing its silicon-proven RISC-V IP to the Silicon Catalyst incubator will help make it easier for emerging startups to build the next generation of semiconductor applications with RISC-V.”

The mission of Silicon Catalyst is to lower the capital expenses associated with the design and fabrication of silicon-based IC’s, sensors, and MEMS devices. For over seven years, the Silicon Catalyst partner ecosystem has enabled early-stage companies to build complex silicon chips at a fraction of the typical cost. Silicon Catalyst has created a unique ecosystem to provide critical support to semiconductor hardware start-ups, including tools and services from a comprehensive network of In-Kind Partners (IKPs). The Portfolio Companies in the incubator utilize IKP tools and services including design tools, simulation software, design services, foundry PDK access and MPW runs, test program development, tester access, and banking and legal services. Additionally, the startups can tap into the world-class Silicon Catalyst network of advisors and investors.

“Adding a tier one RISC-V IP supplier such as Andes Technology; with its broad range of IP, hardware design tools, and integrated software development environment; broadens the selection of design IP and tools our incubator companies have to create with,” said Paul Pickering, Managing Partner at Silicon Catalyst. “Andes’ success with startups in the emerging 5G and AI chip markets demonstrates their understanding of nurturing new ventures building products for markets that are just beginning to field large numbers of new silicon designs. We are pleased to have them join the Silicon Catalyst incubator and look forward to seeing new designs containing their IP.”

About  Silicon Catalyst
It’s About What’s Next® – Silicon Catalyst is the world’s only incubator focused exclusively on accelerating solutions in silicon (including IP, MEMS & sensors), building a coalition of in-kind and strategic partners to dramatically reduce the cost and complexity of development. More than 400 startup companies have engaged with Silicon Catalyst since April 2015, with a total of 38 startup and early-stage companies admitted to the incubator. With a world-class network of mentors to advise startups, Silicon Catalyst is helping new semiconductor companies address the challenges in moving from idea to realization. The incubator/accelerator supplies startups with a path to design tools, silicon devices, networking, access to funding, banking and marketing acumen to successfully launch and grow their companies’ novel technology solutions. The Silicon Catalyst Angels was established in July 2019 as a separate organization to provide access to seed and Series A funding for Silicon Catalyst portfolio companies.

More information is available at www.siliconcatalyst.com and www.siliconcatalystangels.com

About Andes Technology
Sixteen years in business and a Founding Premier member of RISC-V International, Andes is a leading supplier of high-performance/low-power 32/64-bit embedded processor IP solutions, and a main force to take RISC-V mainstream. Andes’ fifth-generation architecture AndeStar™ adopted the RISC-V as the base. Its V5 RISC-V CPU families range from tiny 32-bit cores to advanced 64-bit cores with DSP, FPU, Vector, Linux, superscalar, and/or multicore capabilities. The annual volume of Andes-Embedded SoCs has exceeded 2 billion since 2020 and continues to rise. To the end of 2020, the cumulative volume of Andes-Embedded™ SoCs has surpassed 7 billion.

For more information, please visit https://www.andestech.com. Follow Andes on LinkedIn, Twitter, Facebook, and YouTube!

About RISC-V AndesCore™
Andes Technology’s comprehensive CPU includes entry-level, mid-range, high-end, extensible and security families to address the full range of embedded electronics products, especially for connected, smart and green applications. From 2017, Andes expands its product line to RISC-V processors and provides a total solution in V5 family cores, including N22, N25F/NX25F, D25F, A25/AX25, A25MP/AX25MP, A27/AX27/NX27V, A45/D45/N45, AX45/DX45/NX45 and A45MP/AX45MP.

For more information about Andes Technology products, please visit http://www.andestech.com/

Contact Information
Andes Technology – Jonah McLeod , jonahm@andestech.com

Silicon Catalyst – Richard Curtin, richard@siliconcatalyst.com

Continue ReadingAndes Technology Corp. Brings Its Broad Family of RISC-V CPU IP to the Silicon Catalyst Semiconductor Incubator

Imperas模拟器支持Andes Custom Extension™ 加速特定领域应用软件开发

【台湾新竹、英国牛津】 2021年8月31日─ 32及64位高效能、可扩展RISC-V CPU处理器核心领导供货商、RISC-V国际协会(RISC-V International)创始首席会员晶心科技(TWSE: 6533) 和高效能软件模拟和虚拟平台的领导供货商Imperas Software Ltd.于今日宣布将合作范围拓展到整合开发多功能的Andes Custom Extension™ (ACE)和Imperas高速模拟器。此合作将使SoC设计团队能够利用ACE架构来共同设计新指令硬件和相关软件,在芯片生产之前便可以开始完整的软件开发。

在ACE的架构下,SoC设计者可以轻松且有效率地在Andes RISC-V处理器核心上定义新指令来加速目标应用程序,即透过ACE的简易脚本程序来描述指令的输入输出和功能,及使用ACE的精简Verilog来定义指令在RTL层级的实现方式。根据上述的设计数据,功能强大的COPILOT (Custom-OPtimized Instruction deveLOpment Tools)工具可以自动生成扩展晶心处理器所需的所有新组件,包括处理器的RTL、编译工具、调试器、整合开发环境和近似精确周期 (near cycle-accurate)的模拟器,以支持客制化的新指令。

当SoC架构师和逻辑设计人员着眼于加速他们的应用最花时间的部分,软件工程师则需要在增加新功能的同时,确保整个软件堆栈的功能性和稳健性。在SoC芯片完成设计生产并可用于全面开发之前,快速功能模拟器能让软件工程师开始撰写应用程序、除错和测试,而不需要受限于硬件开发的时程。藉由连结COPILOT产生的扩展模拟链接库,Imperas模拟器能如同手动撰写的模拟器一般,自动辨识新指令并模拟其功能。利用快速模拟器和相关工具,软件工程师除了可以进行全面开发,更可以提供回馈意见给硬件设计人员。

「晶心所有的RISC-V CPU 核心都是可以扩展的。ACE让SoC设计人员在不需要CPU设计的能力之下,就能在我们高效能的CPU核心上能轻松的新增客制化指令,来实现特定应用领域的加速,并提升SoC性能至新的水平,」晶心科技总经理暨技术长苏泓萌博士表示。「Imperas模拟器已经能够支持晶心的RISC-V CPU核心。我们很高兴能够拓展合作范畴,使ACE用户透过使用Imperas的快速模拟器,让软件工程师也可以从早期阶段就参与整个开发过程。」

「RISC-V提供了客制化扩展指令集的灵活性,在符合软件生态系统的同时,提供了系统架构工程师新的自由发展空间。」Imperas Software Ltd.执行长Simon Davidmann表示。「利用虚拟平台所建构的快速软件架构增强ACE设计指令的解决方案。所共同产生的平台可在芯片生产完成前,就提供了虚拟开发板。晶心和Imperas的合作旨在帮助客户和合作伙伴,以软件开发的速度来创新硬件灵活性。」

本次合作在ACE的解决方案中增加快速模拟器及虚拟平台的功能,SoC设计团队可利用晶心RISC-V核心处理器的ACE架构来新增客制化指令,并使用COPILOT工具立即自动生成所有必要组件。这些扩展组件包括处理器RTL、编译工具、调试器、近精确周期模拟器以及Imperas的快速功能模拟器。

關於晶心科技
晶心科技股份有限公司于2005年成立于新竹科学园区,2017年于台湾证交所上市(TWSE:6533)。晶心是RISC-V国际协会的创始首席会员,也是第一家采用RISC-V作为其第五代架构AndeStar™基础的主流CPU供货商。为了满足当今电子设备的苛刻要求,晶心提供了可配置性高的32/64位高效CPU核心,包含DSP,FPU,Vector,超纯量(Superscalar)及多核心系列,可应用于各式SoC与应用场景。晶心并提供功能齐全的整合开发环境和全面的软/硬件解决方案,可帮助客户在短时间内创新其SoC设计。在2020年,Andes-Embedded™ SoC的年出货量突破20亿颗,而截至2020年底,嵌入AndesCore™的SoC累积总出货量已超过70亿颗。更多关于晶心的信息,请参阅晶心官网 https://www.andestech.com,或追蹤晶心WeChatWeiboBilibiliLinkedInTwitter以及YouTube。 

关于Imperas 
Imperas 致力于嵌入式软件和系统的开发,并且是RISC-V处理器模型和虚拟原型解决方案的领导供货商。Imperas和开放虚拟平台(OVP)推进了开源模型,包含一系列处理器、IP供货商、CPU架构、系统IP及处理器和系统的参考平台模型,参考平台模型的部分从简单的单核裸机(bare metal)平台到启动 SMP Linux 的全异构多核系统。所有支持模型都可从Imperas网站www.imperas.com和开放虚拟平台(OVP)网站 www.ovpworld.org取得。

Continue ReadingImperas模拟器支持Andes Custom Extension™ 加速特定领域应用软件开发

Andes Technology And Cyberon Collaborate To Provide Edge-Computing Voice Recognition Solution On DSP-Capable RISC-V Processors

Press highlights:

  • Cyberon DSpotter, the voice wake-up and local command recognition solution, supports Andes RISC-V CPU families
  •  The local and offline command recognition provides users with a quick-response voice operation interface, protects personal privacy, and also reduces the development and maintenance costs of the device manufacturers.
  •  AndesCore™ D25F with DSP/SIMD P-extension instructions boosts the computing performance and efficiency for voice processing to provide competitive voice recognition and voice assistant solutions on edge devices

HSINCHU, TAIWAN – August 19, 2021 – Cyberon Corporation, a leading embedded speech solution provider, and Andes Technology (TWSE: 6533), a major supplier for high efficiency, low-power 32/64-bit RISC-V processor cores, announced their collaboration on the edge-computing voice recognition solution, Cyberon DSpotter, by exploring Andes DSP-capable RISC-V CPU cores such as the popular D25F and comprehensive software development environment to provide a cost-effective, high performance, and easy-to-deploy solution.

The development of AI technology has recently brought tremendous progress in speech recognition. In addition to voice assistant services based on cloud-computing architecture, there are growing demands for local voice recognition by edge-computing devices from the market. Locally executed offline command recognition provides users with a quick-response voice operation interface, protects personal privacy, and reduces the development and maintenance costs of the device manufacturers.

For many products that have a strong demand for voice control, such as wearable devices, home appliances, IoT devices, etc., low computing resource requirements and high recognition performance are important considerations. Therefore, Cyberon based on more than 20 years of professional experience, introduces its new generation algorithm, DSpotter, for voice wake-up and local command recognition.

Different from most solutions in the market, Cyberon’s DSpotter adopts phoneme-based acoustic model to improve customers’ product development efficiency. Developers do not need to collect a large amount of training corpus in advance. They can create the required commands by simply entering text. Based on the relevant foundation built over the past years, Cyberon has developed more than 40 global languages for DSpotter. It helps customers to introduce their products to the global market in a timely manner. Regarding the recognition performance, DSpotter has high accuracy and high noise robustness due to the strength of its acoustic model consisting of TDNN-F architecture. In addition, the algorithm has been well optimized by Cyberon to fit into general MCU platforms without using a dedicated neural network processor. In this way, manufacturers can provide products with voice interfaces through cost-effective hardware.

Furthermore, the performance of DSpotter is increased significantly by leveraging RISC-V DSP/SIMD P-extension (RVP) instructions on AndesCore™ D25F, a 32-bit RISC-V CPU core with highly optimized 5-stage pipeline. The RVP enables multiple data in integer registers to be processed in one single cycle, thus efficiently boosts the computations for voice, audio, image and signal processing. It also greatly improves performance for edge AI involving the above data types. The D25F is the first market-proven RISC-V RVP-capable processor, and has the most complete ecosystem in development tools, libraries for DSP and neural networks, and audio/voice codec.

“The AI technology of edge computing has gradually entered people’s lives,” said Alex Liou, VP of Cyberon Embedded solution BU. “Cyberon’s DSpotter algorithm helps developers to reduce development costs of voice recognition applications. We offer a convenient and easy-to-use tool to create customized commands of global languages. Developers can create various voice recognition applications efficiently to meet the strong and diverse demands of the market. The collaboration with Andes extends the application of DSpotter technology to RISC-V platforms and demonstrates excellent computing and recognition performances. It is hoped that it will bring more products with intelligent and convenient voice interface to people’s lives.”

”Intelligence is now in everyone’s daily life empowering not only by cloud computing but also by edge computing,” said Simon Wang, Technical Marketing Manager of Andes Technology, and in charge of RISC-V compute acceleration ecosystem. “Andes offers a comprehensive 32 and 64 bit RISC-V processor core series with high computation efficiency and low power consumption for general computing solutions. In addition, we provide AI solutions based on RVP, RVV and ACE instruction extensions with the support of Andes NN SDK and have been cooperating with partners to extend our solutions. We are excited to work with Cyberon to offer very competitive voice recognition and voice assistant solutions for edge devices based on the strength of AndesCore™ D25F, esp. its RVP support.”

About Cyberon Corporation
Cyberon Corporation, with its headquarter in New Taipei City, Taiwan, is a leading speech solution provider. Established in 2000, Cyberon has rich experiences in speech algorithm and application development. Its speech recognition and text-to-speech technologies have been widely adopted by IOT devices, home appliances, wearable devices, smart toys, automotive equipment, and enterprise customers. Cyberon provides a full range of voice solutions for embedded MCU/DSP, OS platforms, and server-based services, and is committed to providing users with natural and convenient human-machine voice interfaces. For more information, please visit http://www.cyberon.com.tw

About Andes Technology
Sixteen years in business and a Founding Premier member of RISC-V International, Andes is a leading supplier of high-performance/low-power 32/64-bit embedded processor IP solutions, and a main force to take RISC-V mainstream. Andes’ fifth-generation AndeStar™ architecture adopted the RISC-V as the base. Its V5 RISC-V CPU families range from tiny 32-bit cores to advanced 64-bit cores with DSP, FPU, Vector, Linux, superscalar, and/or multicore capabilities. The annual volume of Andes-Embedded SoCs has exceeded 2 billion since 2020 and continues to rise. To the end of 2020, the cumulative volume of Andes-Embedded™ SoCs has reached 7 billion. For more information, please visit https://www.andestech.com. Follow Andes on Wechat, Weibo, and Bilibili

Continue ReadingAndes Technology And Cyberon Collaborate To Provide Edge-Computing Voice Recognition Solution On DSP-Capable RISC-V Processors

IAR Systems extends development tools performance capabilities for Andes RISC-V cores

Latest version of IAR Embedded Workbench for RISC-V adds support for latest Andes RISC-V processor technology, including AndeStar™ V5 RISC-V Performance Extension

Uppsala, Sweden—June 23, 2021— IAR Systems®, the future-proof supplier of software tools and services for embedded development, presented a new version of its professional development tools for RISC-V. With the latest release, the complete development toolchain IAR Embedded Workbench® for RISC-V adds support for latest Andes RISC-V extension and devices, enabling maximized performance in RISC-V-based applications.

Through its excellent optimization technology, IAR Embedded Workbench for RISC-V helps developers ensure the application fits the required needs and optimize the utilization of on-board memory. With the support of the AndeStar™ V5 RISC-V Performance Extension, developers can use IAR Embedded Workbench to create applications with increased performance and reduced code size. The toolchain supports all Andes 32-bit V5 RISC-V cores, including the N22, N25F, D25F, A25, A27, N45, D45 and A45. The RISC-V Packed SIMD/DSP extension specification (RVP draft) and the corresponding intrinsic functions as well as Andes DSP libraries are supported.

“AndeStar V5 RISC-V architecture brings the unique and competitive value to our RISC-V customers,” said Dr. Charlie Su, Andes Technology President and CTO. “V5 offers full compatibility to the compact, modular and extensible RISC-V technology by supporting its standard instructions. In addition, it incorporates Andes-extended features already proven in 7+ billion AndeStar V3 processors, such as Performance extension and CoDense™ extension, to applications from edge to cloud. We welcome that IAR Systems provides full support to V5 processors and brings the benefits of IAR Embedded Workbench to the RISC-V community.”

IAR Embedded Workbench for RISC-V is a complete C/C++ compiler and debugger toolchain with everything embedded developers need integrated in one single IDE. To ensure code quality, the toolchain includes C-STAT® for static code analysis. C-STAT proves code alignment with industry standards like MISRA C:2012, MISRA C++:2008 and MISRA C:2004, and also detects defects, bugs, and security vulnerabilities as defined by CERT C and the Common Weakness Enumeration (CWE). For companies working with safety-critical applications, IAR Embedded Workbench for RISC-V is available in a functional safety edition certified by TÜV SÜD according to IEC 61508, ISO 26262, IEC 62304, EN 50128, EN 50657, IEC 60730, ISO 13849, IEC 62061, IEC 61511 and ISO 25119, delivering qualified tools, simplified validation and guaranteed support through the product life cycle.

More information about IAR Systems’ offering for RISC-V is available at www.iar.com/riscv.

IAR Systems Contacts

AnnaMaria Tahlén, Media Relations & Content Manager, IAR Systems
Tel: +46 18 16 78 00 Email: annamaria.tahlen@iar.com
Tora Fridholm, Chief Marketing Officer, IAR Systems
Tel: +46 18 16 78 00 Email: tora.fridholm@iar.com

About IAR Systems
IAR Systems supplies future-proof software tools and services for embedded development, enabling companies worldwide to create the products of today and the innovations of tomorrow. Since 1983, IAR Systems’ solutions have ensured quality, reliability and efficiency in the development of over one million embedded applications. The company is headquartered in Uppsala, Sweden and has sales and support offices all over the world. Since 2018, Secure Thingz, the global domain expert in device security, embedded systems, and lifecycle management, is part of IAR Systems Group AB. IAR Systems Group AB is listed on NASDAQ OMX Stockholm, Mid Cap. Learn more at www.iar.com.

#IAR Systems, #IAR Embedded Workbench, #Embedded Trust,#C-Trust,#C-SPY, #C-RUN, #C-STAT, #IAR Visual State, #IAR KickStart Kit, #I-jet, #I-jet Trace, #I-scope, #IAR Academy

Continue ReadingIAR Systems extends development tools performance capabilities for Andes RISC-V cores

熵码科技与晶心科技合作将安全处理器PUFiot导入RISC-V AIoT安全平台

【新竹台灣】─2021年6月2日─致力于PUF (Physical Unclonable Function)安全解决方案硅智财的熵码科技与RISC-V硅智财领导厂商晶心科技(TWSE:6533),率先将力旺电子(TWSE:3529)与熵码科技共同开发的纯硬件安全处理器PUFiot,导入晶心科技具数字信号处理能力的D25F CPU及其应用平台AE350,并成为晶心科技AndeSentry™安全框架的一部分,为RISC-V芯片生态链带来更完整的安全解决方案。

晶心科技的AndeSentry™开放性的安全合作框架汇集多种安全解决方案,其中PUFiot扮演安全协同处理器角色来执行应用所需安全功能,例如安全信任根、抗攻击与防克隆的安全存储、随机数产生器、符合美国NIST高安全标准的对称/非对称算法与密钥生成/管理机制、签章认证与数据加解密功能,结合晶心科技的D25F+AE350平台,实现安全启动、韧体保护、在线更新等更高安全性的系统级安全部署。

熵码科技所开发之硬件安全处理器PUFiot,结合母公司力旺电子所研发的新一代硅智财Quantum-Tunneling PUF (NeoPUF 芯片指纹),与业界首屈一指的Anti-fuse NeoFuse OTP(One-time Programmable Function)存储技术,提供芯片识别信任根基础与稳固的安全边界,并支持各种国际标准算法,包含对称、非对称、哈希算法与SM2/SM3/SM4,提供弹性化的配备与客制空间。

PUFiot具备多项物理/数字抗攻击设计,能进一步抵抗旁路攻击(Side-Channel-Attack)与芯片防克隆 (anti-cloning)。对于侵入式攻击,比方对芯片做聚焦离子束(Focused Ion Beam, FIB ),也有良好的防御效果。

利用芯片指纹产生密钥对(Key pairs)与原生ID (Identity), 可降低实现零接触部署(Zero Touch Deployment)的成本来满足AI/IoT/5G数以兆计连网装置的安全部署。协助云端应用生态,达成零信任(Zero Trust)的安全运作。

晶心科技的RISC-V D25F CPU是32-bit 高效能CPU核心,支持单/双精度浮点运算以及 RVP P-extension (DSP/SIMD)延伸指令; 而AE350应用平台具AHB/AXI汇流接口、中断控制、除错模块以及常用的周边组件如GPIO、I2C、PWM、QSPI、UART和WatchDog Timer等,能让客户设计SoC更为容易。D25F搭配AE350已授权给众多客户并广泛运用在不同的领域。

此次晶心科技和熵码科技在安全硅智财的合作上别具意义,将为RISC-V架构下的芯片生态系统提供极具成本优势的硬件安全解决方案。

关于熵码科技
熵码科技是致力于利用物理不可复制功能(PUF)发展创新安全解决方案的IP设计公司,为力旺电子之子公司。 利基于熵码与力旺团队的技术敏锐度和研发成就,包括力旺电子的NeoPUF和NeoFuse OTP等核心IP,熵码科技将为市场带来新颖的PUF-based安全解决方案。 最新的解决方案包括五合一硬件信任根模块PUFrt和安全加密处理器PUFiot。 凭借我们成熟的产业资源,熵码科技将在广泛的制程技术平台上持续开发兼具卓越性能和成本效益的硬件安全解决方案。
欲了解更多信息请至http://www.pufsecurity.com

关于晶心科技
晶心科技股份有限公司于2005年成立于新竹科学园区,2017年于台湾证交所上市(TWSE:6533)。晶心是RISC-V国际协会的创始首席会员,也是第一家采用RISC-V作为其第五代架构AndeStar™基础的主流CPU供货商。为了满足当今电子设备的严苛要求,晶心提供了高可配置性的32/64位高效CPU核心,包含DSP,FPU,Vector,超纯量(Superscalar)及多核心系列,可应用于各式SoC与应用场景。晶心并提供功能齐全的整合开发环境和全面的软/硬件解决方案,可帮助客户在短时间内创新其SoC设计。Andes-Embedded™ SoC的年出货量在2020年,突破20亿颗,而截至2020年底,累积出货量已超过70亿颗。
更多信息请访问www.andestech.com

关于RISC-V CON 
随着万物联网时代来临,RISC-V以开源特性、精简架构以及可扩充的弹性配置,在全球掀起开源架构新浪潮。32/64位嵌入式CPU核心供货商晶心科技布局RISC-V架构多年,为了进一步推广RISC-V,将于6月3日于在线举办「RISC-V CON研讨会」,以「RISC-V: The Rising Force」为主题,介绍开放式架构的创新特点如何改变半导体产业面貌,以及晶心如何协助客户持续创新并成为市场领导者的成功案例;本次会议还邀请到重量级嘉宾进行专题演讲及展览,一同带来最新生态系趋势与相关产品应用信息,包括晶心客户Telink、Picocom以及合作伙伴IAR Systems、M31、Menta、PGC、Rambus、Secure IC、Simens、Skymizer等,熵码科技也在RISC-V CON分享「芯片指纹实现更安全的芯片应用与服务」之主题演讲。
免费注册及更多信息请访问http://www.andestech.com/Andes_RISC-V_CON_2021_TW/

 

Continue Reading熵码科技与晶心科技合作将安全处理器PUFiot导入RISC-V AIoT安全平台

采用晶心处理器架构的芯片2020年出货量突破20亿颗

2020年累积芯片出货量达70亿颗 屡创新高

【台湾新竹】—20210429—提供32及64位高效能、低功耗RISC-V处理器核心之全球领导供货商晶心科技,今日宣布于2020年度采用晶心处理器架构的系统芯片出货量超过20亿颗,较2019年出货量成长33%,并且总累计出货量超过70亿颗。这些系统芯片被广泛运用于音频装置、蓝牙装置、电玩游戏、GPS、机器学习、MCU、传感器融合(sensor fusion) 、SSD控制器、触控屏幕控制器、储存装置、语音识别、无线充电等多元应用。

晶心科技执行长林志明表示:「虽然2020年全球受到疫情的影响,但嵌入晶心的SoC芯片,出货量仍持续创历史新高。根据统计,2020年20亿颗的出货量中,绝大多数为晶心处理器第三代架构,而于2017年底开始推出之RISC-V系列IP,也在2020年开始贡献权利金,虽然所占比例尚低,但是以IP产品寿命期长的特点,可以判断,RISC-V产品的权利金,也将在未来十数年、甚至数十年内不断对晶心的营收产生贡献。晶心也持续在RISC-V阵营中布局,在RISC-V国际协会(RISC-V International)的董事会及技术指导委员会中,推进并主导RISC-V 技术规划、商务战略及生态系发展。」

晶心科技总经理暨技术长苏泓萌博士则表示: 「采用晶心第三代(V3)处理器解决方案的SoC,每日以将近550万颗产量持续生产中。至于采用第五代(V5)RISC-V的芯片,2020年也已经有客户进入量产;根据2021 Semico Research最新的预测,从2020年到2025年,RISC-V核心的年复合成长率将达到115%。RISC-V架构最大的特色就是模块化,扩充性佳及设计简洁。目前晶心客户的应用,在单一芯片上从只使用单核到超过1,000核都有,应用领域包括5G、人工智能/机器学习、ADAS、AR/VR、区块链、云端运算、数据中心、物联网、储存装置、安防、无线装置等。晶心持续在RISC-V架构中保持技术领先地位,目前推出多款RISC-V系列处理器核心,设计上兼顾灵活运用及高效能低功耗的特性,并结合完整的软件开发环境、计算库、AI编译程序及开放安全框架等多项支持。随着晶心的产品组合,涵盖的应用更为广泛,提供给客户的选择也更多元,将瞄准新兴应用之不同需求,针对特定领域协助客户打造最具竞争力的解决方案。」

关于晶心科技Andes Technology
晶心科技股份有限公司于2005年成立于新竹科学园区,2017年于台湾证交所上市(TWSE: 6533)。晶心是RISC-V国际协会(RISC-V International)的创始首席会员,也是第一家采用RISC-V作为其第五代架构AndeStar™基础的主流CPU供货商。为了满足当今电子设备的苛刻要求,晶心提供了可配置性高的32/64位高效CPU核心,包含DSP、FPU、Vector、超纯量(Superscalar)及多核心系列,可应用于各式SoC与应用场景。晶心并提供功能齐全的整合开发环境和全面的软/硬件解决方案,可帮助客户在短时间内创新其SoC设计。2020年Andes-Embedded™ SoC的年出货量突破20亿颗,而截至2020年,嵌入AndesCore™的SoC累积出货量已超过70亿颗。

关于晶心RISC-V AndesCore™系列
晶心科技全面的RISC-V CPU系列涵盖了入门级32位N22、中阶32位N25F/D25F/A25/A27和64位NX25F/AX25/AX27以及高阶多核A(X)25MP和向量处理器NX27V,以及近期则推出的最新超纯量的45系列。

关于更多晶心科技的信息,欢迎参阅晶心科技官网:http://www.andestech.com/

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