Hex Five Adds MultiZone Security to the Andes RISC-V Cores on GOWIN FPGAs

SAN JOSE, USA – December 17, 2018 – Hex Five Security, Inc, the creator of MultiZone™ Security, Andes Technology Corporation and GOWIN Semiconductor Corp announced a collaboration to enable MultiZoneTM Security, the first Trusted Execution Environment for RISC-V on the Andes N(X)25 RISC-V Cores, which is part of 25-series, with the GOWIN GW-2A Family of FPGAs. 

Hex Five’s patent pending technology provides policy-based hardware-enforced separation for an unlimited number of security zones, with full control over data, code, interrupts and peripherals. MultiZone’s™ Configurator takes fully compiled and linked customer code and merges it with Hex Five’s nanoKernel to enable rapid adoption without any changes to hardware or customer code basis.

Andes 32-bit N25(F)/A25, and 64-bit NX25(F)/AX25 are versatile CPU cores compliant to RISC-V ISA that deliver over 3.5 CoreMark/MHz and 1.3 WMIPS/MHz for single precision floating point. Their common features include dynamic branch prediction, instruction and data caches, local memories, and Andes Custom Extension™ (ACE) to simplify instructions design for Domain-Specific Acceleration. All cores support User/Machine mode, while the A25/AX25 add Supervisor mode and MMU for Linux kernel and its applications. 

GOWIN’s GW2A Family is designed to offer the best-in-class performance cost ratio FPGA. With abundant logic, high-performance DSP resources and high speed I/O, the family is optimized for co-processing to offload the application processor on intensive computation tasks. The GW2A family is also the first FPGA with embedded pSRAM in the industry, which gives customers more usable device I/O.

“The Chinese market will be the first mass adopter of RISC-V,” said Dr. Charlie Su, CTO and Senior VP of Andes. “We’re happy to work with Hex Five to provide our customers a simple, robust security implementation that based on our RISC-V cores and comprehensive AndeSight™, an eclipse-based development environment and optimized toolchains to provide leading performance and reduced development time.”

“Increasingly, customers in China see security as a core requirement of their products,” said Jim Gao, Director of Solution Development, GOWIN Semiconductor. “With MultiZone Security, they can implement a robust security solution on our existing FPGAs without the need for new hardware, deep security expertise or even any changes to their toolset and workflow. This allows a customer to get to market fast, which is the goal of our FPGA solutions.”

“The cost of a robust security implementation on RISC-V is now negligible – the future of RISC-V is security by default.” said Don Barnetson, co-founder of Hex Five Security. “We’re very excited to enter the Chinese market with such strong partners and expand access to simple, robust security that any developer can implement.”

Hex Five, Andes and GOWIN Semiconductor demonstrated MultiZone™ Security at Andes RISC-V CON on Nov 13, 2018 at Andes RISC-V CON in Santa Clara, CA.  http://www.andestech.com/Andes_RISC-V_CON/

About GOWIN Semiconductor Corp
Founded in 2014, GOWIN Semiconductor Corp., headquartered with major R&D in China, has the vision to accelerate customer innovation world wide with our programmable solutions. We focus on optimizing our products and removing barriers for customers using programmable logic devices. Our commitment to technology and quality enables customers to reduce the total cost of ownership from using FPGA on their production boards. Our offerings include a broad portfolio of programmable logic devices, design software, intellectual property (IP) cores, reference designs, and development kits. We strive to serve customers in the consumer, industrial, communication, medical, and automotive markets worldwide.

For more information about GOWIN, please visit http://www.gowinsemi.com/

About Hex Five Security
Hex Five is the creator of MultiZone™ Security, the first trusted execution environment (TEE) for RISC-V. Hex Five’s patent pending technology provides policy-based hardware-enforced separation for an unlimited number of security domains, with full control over data, code, interrupts and peripherals. Contrary to traditional solutions, MultiZone™ Security requires no additional hardware, dedicated cores or clunky programming models. Open source libraries, third party binaries and legacy code can be configured in minutes to achieve unprecedented levels of safety and security. 

MultiZone™ Security is a free and open standard. Download it from the open source repository at https://github.com/hex-five

For more information visit https://www.hex-five.com/

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IAR Systems and Andes collaborate to boost performance for RISC-V users

Establish partnership to provide powerful solutions based on Andes’ RISC-V technologies

Uppsala, Sweden and Hsinchu, Taiwan—November 29, 2018—
IAR Systems®, the future-proof supplier of software tools and services for embedded development, and Andes, the prominent CPU IP provider, announce that they have formed a partnership in order to deliver powerful development tools for Andes’ RISC-V-based solutions.

IAR Systems provides the C/C++ compiler and debugger toolchain IAR Embedded Workbench®. The toolchain offers leading code performance for size and speed, as well as extensive debug functionality with a fully integrated debugger with simulator and hardware debugging support. Since 1983, IAR Systems’ solutions have ensured quality, reliability and efficiency in the development of over one million embedded applications. The strong technology offering is accompanied by IAR Systems’ renowned technical support and services.

Andes Technology Corporation is a leading embedded processor intellectual property supplier. Since 2005, the company develops high-performance, low-power processors and their associated SoC platforms, and they have created a rich series of 32-bit embedded CPU core families with a record of more than 2.5 billion accumulated units of Andes-Embedded SoC shipped globally by end of 2017. Andes provides the RISC-V cores, AndesCore™ N25(F)/NX25(F) and A25/AX25, with AndeStar™ V5 instruction extension and leading Andes Custom Extension™ (ACE) instruction customization capabilities. The AndesCore families are being used for a wide range of smart emerging applications including satellite navigation, high-precision sensor fusion, advanced smart meters, smart wireless communication, networking, voice processing, ADAS, storage, and machine/deep learning. To further boost the performance in the target applications, and to ensure code density, Andes and IAR Systems collaborate to support the cores in IAR Embedded Workbench.

“Andes is moving heavily into RISC-V, and we are determined to support their efforts,” says Anders Holmberg, Chief Strategy Officer, IAR Systems. “By providing maximized code speed and minimized code size for Andes powerful RISC-V cores, we will create new possibilities to reduce time to market and ensure high quality applications based on Andes’ RISC-V ISA.”

“We are excited to partner with IAR Systems to bring new capabilities to the RISC-V community,” comments Dr. Charlie Su, CTO and Senior VP, Andes Technology Corporation. “Together, we will offer powerful solutions for Andes V5 extended ISA as well as ACE that will enable our customers to meet the demanding requirements of today’s electronic devices.”

Support for Andes cores will be provided in IAR Embedded Workbench for RISC-V. The toolchain is currently under development and the first version will be available in mid-2019. 

About IAR Systems

IAR Systems supplies future-proof software tools and services for embedded development, enabling companies worldwide to create the products of today and the innovations of tomorrow. Since 1983, IAR Systems’ solutions have ensured quality, reliability and efficiency in the development of over one million embedded applications. The company is headquartered in Uppsala, Sweden and has sales and support offices all over the world. Since 2018, Secure Thingz, a provider of advanced security solutions for embedded systems in the IoT, is part of IAR Systems. IAR Systems Group AB is listed on NASDAQ OMX Stockholm, Mid Cap. Learn more at www.iar.com.

About Andes

Andes Technology, the first CPU IP supplier in Asia, has been developing innovative high-performance/low-power 32/64-bit processors and associated SoC platforms since its establishment in 2005. Its powerful CPU lineup has achieved design wins in numerous embedded applications across the world, making a cumulative record of over 2.5 billion SoC shipments containing Andes IP up to 2017. Andes is a founding member of the RISC-V Foundation and also the first mainstream CPU vendor adopting the RISC-V open ISA. For more information please visit: www.andestech.com.

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GlobeNewswire – Andes RISC-V CON Debuts at Hyatt Regency Santa Clara November 13; Linley Group, MediaTek, Andes, Faraday, GOWIN, Imperas Software, Hex Five, and XtremeEDA to Detail RISC-V Technology Advance

Continue ReadingGlobeNewswire – Andes RISC-V CON Debuts at Hyatt Regency Santa Clara November 13; Linley Group, MediaTek, Andes, Faraday, GOWIN, Imperas Software, Hex Five, and XtremeEDA to Detail RISC-V Technology Advance