Andes Technology and Crypto Quantique in Global Partnership to Deliver the Ultimate RISC-V IoT Device Security

LONDON, May 17, 2022 — Crypto Quantique, a specialist in quantum-driven cyber security for the internet of things (IoT), announces a global partnership with Andes Technology (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099), a leading supplier of high efficiency, low-power 32/64-bit RISC-V processor cores and Founding Premier member of RISC-V International. Crypto Quantique also joined AndeSentry™ security framework, which provides a variety of security solutions to Andes RISC-V processors, countering attacks ranging from cyber-attacks to physical attacks.

Andes cooperates with Crypto Quantique’s quantum-driven semiconductor root-of-trust IP, quantum-driven semiconductor hardware IP (called QDID), and the company’s chip-to-cloud IoT device security management platform, QuarkLink, to bring our customers an industrial grade cyber-security solution.

QDID, which has been independently verified as robust against all known cyberattack mechanisms, measures quantum effects occurring in the fabric of silicon wafers to produce unique, unforgeable identities and cryptographic keys on-demand inside microcontrollers and application-specific integrated circuits (ASICs). The identities and keys create a root-of-trust for the chips, which are used in IoT devices and edge nodes. QDID is a physical unclonable function (PUF) that eliminates key injection and the requirement to store keys in device memories. It fits in the security framework embraced by the RISC-V architecture.

QuarkLink is an end-to-end IoT security software technology. It works with QDID or other roots-of-trust to provide secure provisioning, automated onboarding to on-premises or cloud platforms, security monitoring, and certificate and key renewal or revocation. With QuarkLink, a few keystrokes can connect thousands of IoT devices to servers automatically through cryptographic APIs.

Crypto Quantique’s CEO, Dr. Shahram Mossayebi, commented, “The traction that RISC-V has achieved in recent years, much of it driven by Andes Technology, has firmly established the instruction set as a leading contender for high performance, low power processors of the kind found in IoT devices. We see this partnership as a perfect fit of two companies that anticipate and respond to our industry’s technical challenges with silicon innovation. RISC-V processors improve the performance of IoT devices while reducing power consumption and cost. QDID does the same for the security of the chips that drive these devices, and the networks in which they’re deployed.”

KY Hsieh, Senior Technical Marketing Manager of Andes Technology, added, “Leading-edge processors need leading-edge security in a world that faces a growing plague of cyberattacks. Device security is part of that and an essential element in every chip design. Crypto Quantique’s IoT security products would help our goal of offering customers best-in-class technologies to give them a competitive edge on cyberattack protection. We are excited that Crypto Quantique becomes a part of the AndeSentry™ collaborative security framework, which offers a rich set of security solutions for the RISC-V ecosystem.”

About Crypto Quantique
Crypto Quantique has created the world’s most secure end-to-end IoT security platform. At its heart is the world’s first quantum-driven semiconductor hardware IP, called QDID, that generates multiple, unique, unforgeable cryptographic keys for devices manufactured using standard CMOS processes. The keys do not need to be stored and can be used independently by multiple applications on demand. When combined with cryptographic APIs from the company’s universal IoT security platform, QuarkLink, the solution creates a secure bridge between silicon, device, software, and solutions provider.

The company, which is based in London, UK, was co-founded by Dr. Shahram Mossayebi (CEO), an expert in cryptosystems, and Dr. Patrick Camilleri (VP Research & Innovation), a semiconductor designer with significant experience in complex parallel computer systems.

For more information, please visit: www.cryptoquantique.com , and follow us on LinkedIn and Twitter.

About Andes Technology
Seventeen years in business and a Founding Premier member of RISC-V International, Andes (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099) is a leading supplier of high-performance/low-power 32/64-bit embedded processor IP solutions, and the driving force in taking RISC-V mainstream. Andes’ fifth generation AndeStar™ architecture adopted the RISC-V as the base. Its V5 RISC-V CPU families range from tiny 32-bit cores to advanced 64-bit cores with DSP, FPU, Vector, Linux, superscalar, and/or multicore capabilities. The annual volume of Andes-Embedded SoCs has exceeded 3 billion since 2021 and continues to rise. In the end of 2021, the cumulative volume of Andes-Embedded™ SoCs has surpassed 10 billion.

For more information, please visit https://www.andestech.com/en/homepage
Follow Andes on Twitter, LinkedIn, YouTube and Facebook.

Media contact
Bob Jones, Originality B2B
pr@cryptoquantique.com
+44 7802 956179

Jonah McLeod,
jonahm@andestech.com
+1 510 4498634

Continue ReadingAndes Technology and Crypto Quantique in Global Partnership to Deliver the Ultimate RISC-V IoT Device Security

ZAYA and Andes Technology Offer Certifiable TEE Security for RISC-V Based Systems

ZAYA, a leading IoT Security company and a Strategic member of RISC-V International and Andes Technology (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099), a leading RISC-V CPU IP vendor and a Founding and Premier member of RISC-V International, announce the successful integration of ZAYA Secure OS and ZAYA MicroContainers(μContainers) with AndesCore™ RISC-V processors to offer certifiable TEE security. ZAYA’s solutions will become a part of the AndeSentry™ security framework from Andes Technology, providing a rich set of security solutions for the RISC-V ecosystem.

ZAYA Secure OS is a secure Operating System designed according to the IoT security certification requirements. ZAYA OS creates an isolated space on the running environment that handles all essential security mechanisms, as a Trusted Execution Environment (TEE). ZAYA Secure OS is a PSA Certified Level 1 and PSA Functional API Certified Operating System. It meets PSA Certified Security 10 Goals and provides essential security functionality using the PSA Functional API including Cryptography, Secure Storage and Attestation Services.

ZAYA Secure OS provides containerization technology even for MMU-less microcontrollers, called ZAYA μContainers. ZAYA μContainers run on top of the isolated ZAYA Secure OS/TEE with limited and dedicated access rights to run user applications, microservices or untrusted third-party libraries as isolated environments. ZAYA μContainers are independent executables that can be developed, installed and upgraded independently in the field that makes ZAYA μContainers deployment (such as OTA) friendly; this approach also offers cost-effective modular IoT Security Assessments for IoT Vendors.

AndeSentry™ security framework enables open collaboration and brings out a variety of security solutions to RISC-V processors from cyber-attacks to physical attacks. Here are two examples. To secure the booting for a system, AndeSentry™ Secure Boot provides an optimized library of digital signature algorithm with tiny memory footprint and optimized boot time for AndesCore™. To protect against the vulnerability of JTAG debug port, AndeSentry™ Secure Debug extends debug architecture for AndesCore™ by locking the JTAG signals between the debug interface of an external debugger and AndesCore™ JTAG Debug Transport Module.

To guarantee confidentiality and integrity of code and data during the runtime, AndeSentry™ Monitor incorporates ZAYA Secure OS and μContainer solution. It provides secure development environment compliant to IoT Security Certifications. When integrated with AndesCore™ under AndeSentry™ Monitor, ZAYA’s solution fulfills all PSA and SESIP Certification requirements such as Isolation (PSA Type 3, The Highest Level), Secure Update with Anti-Rollback, Secure Boot, and Secure Lifecycle. The solution is ideal for the growing devices demanding security such as AIoT devices, connected devices, and automotive devices, etc.

“With AndeSentry™ framework, chipmakers could realize secure devices based on AndesCore™. We are glad to have ZAYA Secure OS and μContainers under AndeSentry™ Monitor,” said Dr. Charlie Su, President and CTO of Andes Technology. “The successful joint effort between Zaya and Andes Technology is a significant milestone for the RISC-V security ecosystem. It brings rich security solutions to help speed up the development of secure devices.”

“Collaboration is the success key in IoT Security, we are glad to support Andes Solutions and be a part of AndeSentry™ Framework,” said Murat CAKMAK, CEO and Founder of ZAYA. “The partnership between Andes and ZAYA offers a leading cost-effective, ultra-secure and Certification Ready development environment for RISC-V based systems.”

About ZAYA
ZAYA is the leading IoT Security Company based in Cambridge, UK that develops innovative solutions to solve IoT design challenges and limitations. ZAYA provides secure development environments from bottom to top, including Secure Operating Systems, secure middleware, cloud management, and advanced data processing such as AI/ML services. For more information, please visit: http://www.za-ya.co  | Follow ZAYA on Twitter, LinkedIn.

About Andes Technology
Seventeen years in business and a Founding Premier member of RISC-V International, Andes (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099), is a leading supplier of high-performance/low-power 32/64-bit embedded processor IP solutions, and the driving force in taking RISC-V mainstream. Andes’ fifth-generation AndeStar™ architecture adopted the RISC-V as the base. Its V5 RISC-V CPU families range from tiny 32-bit cores to advanced 64-bit cores with DSP, FPU, Vector, Linux, superscalar, and/or multicore capabilities. The annual volume of Andes-Embedded SoCs has exceeded 3 billion since 2021 and continues to rise. The cumulative volume of Andes-Embedded™ SoCs has reached 10 billion by the end of 2021. For more information, please visit https://www.andestech.com.
Follow Andes Technology on Twitter, LinkedIn, YouTube and Facebook.

 

Continue ReadingZAYA and Andes Technology Offer Certifiable TEE Security for RISC-V Based Systems

Rapid Silicon Licenses AndesCore™ D45 with DSP/SIMD extensions and Andes Custom Extension™ Framework

Andes Technology Corporation (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099), a leading supplier of high efficiency, low-power 32/64-bit RISC-V processor cores and Founding Premier member of RISC-V International, today announced Rapid Silicon, a provider of AI-enabled application-specific FPGAs based on open-source technology has taken a license for the AndesCore™ D45 with DSP/SIMD extensions as well as the Andes Custom Extension™ (ACE) framework. The superscalar 8-stage D45 RISC-V Core will be hardened and embedded into an FPGA to provide a full-speed CPU. The COPILOT tool of the ACE framework will allow designers to create their own CPU instructions that will be instantiated into the FPGA gates surrounding the hard-core CPU; at the same time, all required software development tools will be updated automatically by the COPILOT on designers’ desktop.

“We are delighted to offer our customers Andes high performance D45 CPU hard core with DSP/SIMD extensions in Rapid Silicon domain-specific, power, performance, and area (PPA) optimized FPGAs to target diverse applications in telecom, automotive, data processing and industrial vertical markets,” said Rapid Silicon’s Chairman & CEO, Dr. Naveed Sherwani. “To achieve a fast start to our ambitious goal of building the largest independent AI-enabled FPGA company, we needed silicon proven IP that could quickly and easily be added to our board-based FPGA. Furthermore, having an easy-to-use COPILOT development tool that enables Rapid Silicon to add our own custom instructions with little additional design time will shorten customers’ time to market considerably.”

“Andes Technology welcomes Rapid Silicon’s choice of our AndesCore™ D45 with DSP/SIMD extensions,” said Andes Chairman and CEO Frankwell Lin. “The D45 is popular with designers developing high performance signal processing applications.  In combination with COPILOT, the most user-friendly and production proven RISC-V custom extension development tool, designers can optimize their SoC to achieve the ideal combination of power, performance, area and application programmability. We wish Naveed great success with his new products.”

About Andes Technology
Seventeen years in business and a Founding Premier member of RISC-V International, Andes is publicly listed company (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099) and a leading supplier of high-performance/low-power 32/64-bit embedded processor IP solutions, and the driving force in taking RISC-V mainstream. Andes’ fifth generation AndeStar™ architecture adopted the RISC-V as the base. Its V5 RISC-V CPU families range from tiny 32-bit cores to advanced 64-bit cores with DSP, FPU, Vector, Linux, superscalar, and/or multicore capabilities. The annual volume of Andes-Embedded SoCs has exceeded 3 billion in 2021 and continues to rise. By the end of 2021, the cumulative volume of Andes-Embedded™ SoCs has surpassed 10 billion. For more information, please visit https://www.andestech.com. Follow Andes on LinkedIn, Twitter, Facebook, and YouTube! 

About Rapid Silicon
Rapid Silicon is a leader in AI enabled application-specific FPGAs for diverse target applications. We utilize a combination of open-source methodology and proprietary AI technology to significantly improve design and simplify the customer experience. To learn more about Rapid Silicon, please visit www.rapidsilicon.com.

Continue ReadingRapid Silicon Licenses AndesCore™ D45 with DSP/SIMD extensions and Andes Custom Extension™ Framework

Andes Enters RISC-V CPU IP Market in India with Partner Excelmax

Hsinchu, Taiwan—April 12, 2022— Andes Technology Corporation (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099), a leading supplier of high efficiency, low-power 32/64-bit RISC-V processor cores and Founding Premier member of RISC-V International, today announces a partnership with Excelmax Technologies Pvt Ltd to represent, promote and support all Andes RISC-V products in India.

India, the world’s sixth largest economy, is witnessing significant growth in electronic manufacturing services over the past few years. Due to the large and growing population of Indian engineers in Silicon Valley, the bonding between international tier one high-tech companies and India is getting closer. Favorable government new policies provide more incentives to home grown SoC design houses and international chipmakers to grow and pursue semiconductor design and manufacture for local as well as international markets. India also plans to set up domestic design companies and invests in developing high-tech clusters. The strong demand for advanced chips is accelerating the growth of the SoC development market, which is expected to be at nearly 10% CAGR.


Excelmax, headquartered at Bangalore and founded by industry experts in the field of VLSI and embedded domain, is a product engineering services house focusing in the areas of ASIC/FPGA and embedded design. Excelmax has strong presence in India in terms of wide client base across all verticals, has grown exponentially, and poises to grow further aiming to be a premier solutions provider catering to semiconductor industry. The leadership team members all have more than 20 years experience in embedded system hardware/software design and verification. 

“India SoC market and demand for CPU IP are growing so fast that Andes can’t ignore. It is important to provide our sales and technical support capabilities there, that’s why we chose Excelmax as our partner,” said Frankwell Lin, Chairman and CEO of Andes Technology. “Excelmax is familiar and working with many of India’s technology leaders for years which makes our partnership more effective. We are excited to cooperate with Excelmax in expanding the visibility and market share of Andes RISC-V processors in India.”

“Andes Technology is the world’s leading provider of RISC-V CPU IP for a variety of applications such as 5G, AI, IoT, MCU, Networking, Storage and Wearables,” said Shekhar Patil, CEO and founder of Excelmax Technologies. “Our SoC customers are eager to have high performance and costeffective CPU IPs for their design. We look forward to offering our customers the full line of Andes industry-leading RISC-V cores and promoting our professional customer service throughout India.”

About Andes Technology
Seventeen years in business and a Founding Premier member of RISC-V International, Andes is publicly listed company (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099) and a leading supplier of high-performance/low-power 32/64-bit embedded processor IP solutions, and the driving force in taking RISC-V mainstream. Andes’ fifth-generation AndeStar™ architecture adopted the RISC-V as the base. Its V5 RISC-V CPU families range from tiny 32-bit cores to advanced 64-bit cores with DSP, FPU, Vector, Linux, superscalar, and/or multicore capabilities. The annual volume of Andes-Embedded SoCs has exceeded 3 billion in 2021 and continues to rise. By the end of 2021, the cumulative volume of AndesEmbedded™ SoCs has surpassed 10 billion. For more information, please visit https://www.andestech.com. Follow Andes on Twitter, LinkedIn, YouTube and Facebook!

About Excelmax Technologies Pvt Ltd
To address perennial challenges of accelerated time-to-market and improved product quality, Leverage Excelmax’s VLSI and Embedded engineering services to build and retain competitive advantage. Founded by experts and with vast experience, Excelmax has created value with our engineering services offerings at numerous global corporations and earned accolades. Recognized as one of India’s fastest growing technology companies, with a strong team of domain experts, we offer consulting services for ASIC Digital Design and Verification, DFT and Physical design, Analog design, Embedded Application Software, Embedded Firmware and Product design and Solutions.

Media Contacts:
Andes Technology
Hsiao-Ling Lin
Marcom Manager, Andes Technology
Email: hllin@andestech.com

Excelmax Technologies India
Email: info@excelmaxtech.com

Continue ReadingAndes Enters RISC-V CPU IP Market in India with Partner Excelmax

Andes Releases AndeSight™ IDE v5.1 to Simplify Software Development for RISC-V Heterogeneous Multiprocessor and AI

  • Tags: Andes, AndeSight, RISC-V, IDE, BSP, Software, Software Development, AI, IoT, NN, DSP, Vector, Heterogeneous Computing, Multicore, Multiprocessor

Press Highlights:

  • AndeSight™ IDE v5.1 has been released in Q1 2022
  • Key features: the first RISC-V SMP Zephyr™ RTOS, OpenAMP support, heterogeneous multiprocessor debugging, scripting automation, AndesClarity™ processor pipeline visualizer and analyzer, optimized compute libraries for AI and IoT applications for using RISC-V DSP/SIMD and Vector extension, auto-vectorization, and Andes Neural Network (NN) Library

Developing Applications on Heterogeneous Multiprocessors Using the Powerful AndeSight™ IDE Tools
AndeSight™ IDE v5.1 brings the power of application development, debugging, and analysis to the heterogeneous RISC-V multiprocessors, including the cutting-edge Andes RISC-V Superscalar Multicore A(X)45MP and Andes RISC-V Vector Processor NX27V. To support OS with SMP (Symmetric Multiprocessing), besides Linux SMP which has been well supported in RISC-V upstream and Andes platforms, Andes offers the first RISC-V port for SMP Zephyr™ RTOS and Zephyr’s driver subsystem. It has been verified on Andes RISC-V multicore platform. Developers only need to focus on the applications themselves without worrying about the underlying system software. As to AMP (Asymmetric Multiprocessing) demands, AndeSight™ integrates the OpenAMP which provides communication infrastructure between heterogeneous systems and enables AMP applications to leverage parallelism offered by multiprocessor systems.

AndeSight™ provides the user-friendly multicore debugging feature for both SMP and AMP systems in one IDE interface. To further enhance the ultimate debugging efficiency for multiprocessors, it offers a handy feature “Core Grouping” by sending debug commands to a set of cores in the same debug session. AndeSight™ also offers the record-and-replay scripting capability to save interactive steps for easy issue reproduction and automatic testing.

Accelerating AI Computations with RISC-V DSP/SIMD Extension (RVP), RISC-V Vector Extensions (RVV), Auto-vectorization, the Tools and Runtime from AndeSight™ IDE
The RVP extension enables multiple data in integer registers to be processed in one single cycle, thus efficiently boosting the performance with low power consumption for TinyML®, AIoT, and signal processing applications on edge and endpoint. Moreover, the RVV extension targets high-volume data computations with a configurable vector processing architecture; therefore, it provides scalable, efficient, and powerful compute capabilities for AI, NN, and data processing applications in edge and cloud computing.

To simplify the software development and unleash the potential of powerful ISA extensions, AndeSight™ offers full support from toolchains for RVP and RVV, their respective intrinsic functions, highly optimized DSP and Vector libraries, and sample codes to guide code optimization. Moreover, AndeSight™ IDE v5.1 enables auto-vectorization to generate RVV instructions automatically by the compiler. With the above support from AndeSight™, software developers can fully utilize the vector computing power in the C language.

To achieve the ultimate performance of a sophisticated vector processor like AndesCore™ NX27V, a processor pipeline analyzer is needed to help developers exploit the full capabilities of processors. AndesClarity™ visualizes the pipeline execution and resource bottleneck. Developers could discover stall bubbles, reasons to stall, and data dependencies associated with the instructions, the C source code, and hardware functional units for further optimization.

In addition, users could dramatically speed up the development of Neural Network algorithms with the AndeSoft™ NN Library. The NN library is optimized for RVP and RVV instructions for INT8 and FP16 data types. It also supports several quantization methods: shift-based, symmetry, and asymmetry. For MobileNet-v1 inference using NN library with FP16 data type, the NX27V processor with 512-bit SIMD width and 512-bit vector length achieves a 96x speedup over itself executing only RISC-V baseline extensions. Moreover, TensorFlow Lite for Microcontroller can execute TensorFlow models with AndeSoft™ NN Library on development boards.

AndeSight™ facilitates and streamlines the development of embedded systems and provides customers with a versatile integrated environment, including outstanding toolchains and libraries, scripting for automated operations, AndeSim™ near cycle simulator, handy analysis tools, and OS awareness development. Moreover, AndeSight™ provides abundant reference codes that enable developers to get started easily.

“We are delighted to see the arrival of the AndeSight™ IDE v5.1. It simplifies software development with handy features and optimized tools and helps accelerate the completion of highly competitive products,” said Andes President and CTO Dr. Charlie Su. “Processors cannot deliver their full capabilities without the matching software solutions. With comprehensive AndeSight™ IDE, customers can release their software with more features, better performance and higher quality in a shorter time.”

Note: All trademarks, logos, and brand names are the property of their respective owners

About Andes Technology
Seventeen years in business and a Founding Premier member of RISC-V International, Andes is publicly listed company (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099) and a leading supplier of high-performance/low-power 32/64-bit embedded processor IP solutions, and the driving force in taking RISC-V mainstream. Andes’ fifth-generation AndeStar™ architecture adopted the RISC-V as the base. Its V5 RISC-V CPU families range from tiny 32-bit cores to advanced 64-bit cores with DSP, FPU, Vector, Linux, superscalar, and/or multicore capabilities. The annual volume of Andes-Embedded SoCs has exceeded 3 billion in 2021 and continues to rise. By the end of 2021, the cumulative volume of Andes-Embedded™ SoCs has surpassed 10 billion. For more information, please visit https://www.andestech.com. Follow Andes on LinkedIn, Twitter, Facebook, and YouTube! 

For more information about Andes Technology products, please visit http://www.andestech.com/

Contact us
Andes Technology Corporation
sales@andestech.com | +886 3 572 6533

Continue ReadingAndes Releases AndeSight™ IDE v5.1 to Simplify Software Development for RISC-V Heterogeneous Multiprocessor and AI

Andes Releases AndeSight™ IDE v5.1 to Simplify Software Development for RISC-V Heterogeneous Multiprocessor and AI

  • Tags: Andes, AndeSight, RISC-V, IDE, BSP, Software, Software Development, AI, IoT, NN, DSP, Vector, Heterogeneous Computing, Multicore, Multiprocessor

Press Highlights:

  • AndeSight™ IDE v5.1 has been released in Q1 2022
  • Key features: the first RISC-V SMP Zephyr™ RTOS, OpenAMP support, heterogeneous multiprocessor debugging, scripting automation, AndesClarity™ processor pipeline visualizer and analyzer, optimized compute libraries for AI and IoT applications for using RISC-V DSP/SIMD and Vector extension, auto-vectorization, and Andes Neural Network (NN) Library

Developing Applications on Heterogeneous Multiprocessors Using the Powerful AndeSight™ IDE Tools
AndeSight™ IDE v5.1 brings the power of application development, debugging, and analysis to the heterogeneous RISC-V multiprocessors, including the cutting-edge Andes RISC-V Superscalar Multicore A(X)45MP and Andes RISC-V Vector Processor NX27V. To support OS with SMP (Symmetric Multiprocessing), besides Linux SMP which has been well supported in RISC-V upstream and Andes platforms, Andes offers the first RISC-V port for SMP Zephyr™ RTOS and Zephyr’s driver subsystem. It has been verified on Andes RISC-V multicore platform. Developers only need to focus on the applications themselves without worrying about the underlying system software. As to AMP (Asymmetric Multiprocessing) demands, AndeSight™ integrates the OpenAMP which provides communication infrastructure between heterogeneous systems and enables AMP applications to leverage parallelism offered by multiprocessor systems.

AndeSight™ provides the user-friendly multicore debugging feature for both SMP and AMP systems in one IDE interface. To further enhance the ultimate debugging efficiency for multiprocessors, it offers a handy feature “Core Grouping” by sending debug commands to a set of cores in the same debug session. AndeSight™ also offers the record-and-replay scripting capability to save interactive steps for easy issue reproduction and automatic testing.

Accelerating AI Computations with RISC-V DSP/SIMD Extension (RVP), RISC-V Vector Extensions (RVV), Auto-vectorization, the Tools and Runtime from AndeSight™ IDE
The RVP extension enables multiple data in integer registers to be processed in one single cycle, thus efficiently boosting the performance with low power consumption for TinyML®, AIoT, and signal processing applications on edge and endpoint. Moreover, the RVV extension targets high-volume data computations with a configurable vector processing architecture; therefore, it provides scalable, efficient, and powerful compute capabilities for AI, NN, and data processing applications in edge and cloud computing.

To simplify the software development and unleash the potential of powerful ISA extensions, AndeSight™ offers full support from toolchains for RVP and RVV, their respective intrinsic functions, highly optimized DSP and Vector libraries, and sample codes to guide code optimization. Moreover, AndeSight™ IDE v5.1 enables auto-vectorization to generate RVV instructions automatically by the compiler. With the above support from AndeSight™, software developers can fully utilize the vector computing power in the C language.

To achieve the ultimate performance of a sophisticated vector processor like AndesCore™ NX27V, a processor pipeline analyzer is needed to help developers exploit the full capabilities of processors. AndesClarity™ visualizes the pipeline execution and resource bottleneck. Developers could discover stall bubbles, reasons to stall, and data dependencies associated with the instructions, the C source code, and hardware functional units for further optimization.

In addition, users could dramatically speed up the development of Neural Network algorithms with the AndeSoft™ NN Library. The NN library is optimized for RVP and RVV instructions for INT8 and FP16 data types. It also supports several quantization methods: shift-based, symmetry, and asymmetry. For MobileNet-v1 inference using NN library with FP16 data type, the NX27V processor with 512-bit SIMD width and 512-bit vector length achieves a 96x speedup over itself executing only RISC-V baseline extensions. Moreover, TensorFlow Lite for Microcontroller can execute TensorFlow models with AndeSoft™ NN Library on development boards.

AndeSight™ facilitates and streamlines the development of embedded systems and provides customers with a versatile integrated environment, including outstanding toolchains and libraries, scripting for automated operations, AndeSim™ near cycle simulator, handy analysis tools, and OS awareness development. Moreover, AndeSight™ provides abundant reference codes that enable developers to get started easily.

“We are delighted to see the arrival of the AndeSight™ IDE v5.1. It simplifies software development with handy features and optimized tools and helps accelerate the completion of highly competitive products,” said Andes President and CTO Dr. Charlie Su. “Processors cannot deliver their full capabilities without the matching software solutions. With comprehensive AndeSight™ IDE, customers can release their software with more features, better performance and higher quality in a shorter time.”

Note: All trademarks, logos, and brand names are the property of their respective owners

About Andes Technology
Seventeen years in business and a Founding Premier member of RISC-V International, Andes is publicly listed company (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099) and a leading supplier of high-performance/low-power 32/64-bit embedded processor IP solutions, and the driving force in taking RISC-V mainstream. Andes’ fifth-generation AndeStar™ architecture adopted the RISC-V as the base. Its V5 RISC-V CPU families range from tiny 32-bit cores to advanced 64-bit cores with DSP, FPU, Vector, Linux, superscalar, and/or multicore capabilities. The annual volume of Andes-Embedded SoCs has exceeded 3 billion in 2021 and continues to rise. By the end of 2021, the cumulative volume of Andes-Embedded™ SoCs has surpassed 10 billion. For more information, please visit https://www.andestech.com. Follow Andes on LinkedIn, Twitter, Facebook, and YouTube! 

For more information about Andes Technology products, please visit http://www.andestech.com/

Contact us
Andes Technology Corporation
sales@andestech.com | +886 3 572 6533

Continue ReadingAndes Releases AndeSight™ IDE v5.1 to Simplify Software Development for RISC-V Heterogeneous Multiprocessor and AI