Andes Technology Steps Up to Premier Membership in RISC-V International; Greatly Expanding its U.S. R&D and Field Application Engineering Staffing

SAN JOSE CA – June 8, 2020 – Andes Technology Corporation (TWSE: 6533), a leading supplier of high efficiency, low-power 32/64-bit RISC-V processor cores and founding member of RISC-V International, announces its Premier membership in the organization. Andes President Frankwell Lin takes his seat on the RISC-V International Board. Andes CTO and Executive VP Charlie Su becomes Vice Chair of the RISC-V International Technical Steering Committee. The company will take an active role in the upcoming 2020 RISC-V Summit. Andes’ increased participation in RISC-V International reflects the growing demand for its broad family of RISC-V cores including its highly demanded RISC-V cores with DSP or vector extensions. As a result, Andes Technology is growing its U.S. footprint by expanding its R&D and applications engineering staffing several fold.

“We’ re seeing a rapid expansion in our RISC-V business thanks to system-on-chip designers’ eager adoption of the open source RISC-V CPU instruction set architecture,” said Andes President Frankwell Lin.  “Our RISC-V CPU IPs offerings in 2018 have grown three-fold to cover a wide spectrum of applications from IoT devices at the edge to compute intensive servers in the cloud. Last year, our RISC-V solutions have already represented the major share of Andes’ business.”

“The Andes growing R&D team worldwide has demonstrated its engineering ingenuity in our expanding RISC-V offerings,” said Andes Technology CTO and Executive VP Charlie Su. “We developed powerful internal design tools to quickly architect, design, and verify a new processor core. This design flow allows us to rapidly launch a new product to meet rapidly evolving market demand. The development of Andes NX27V RISC-V core with vector extension is a prime example. NX27V is the world first commercial RISC-V vector processor. Andes engineering team had launched and integrated it into customer’s SoC design in a short time. Andes had productized this CPU design automation expertise in the form of our Andes Custom Extension™ (ACE) and COPILOT tool that allows SoC designers to add custom instructions to our RISC-V CPU to make it unique to their solution.”

“Andes USA’s growing footprint has included expanding R&D staffing as well as sales and field application engineering,” said Emerson Hsiao, Andes Technology USA Corp. Senior VP. “In spite of the current constrained business atmosphere, Andes USA continues to experience strong demand for our RISC-V IP solutions. This is in no small part due to Andes’ powerful design automation tools Andes Custom Extension™ and COPILOT. They allow designers to create custom instructions to greatly accelerate performance while drastically reducing power consumption. This capability contributed significantly to the business growth for Andes USA. We continue to look for talented individuals to help us with our growth.”

About Andes Technology Corp.
Andes Technology Corporation is a world class creator of innovative high-performance/low-power 32/64-bit processor cores and associated development environment that serves the rapidly growing global market for embedded system applications. As the founding Premier member of RISC-V International, Andes is the first mainstream CPU vendor that adopted the RISC-V as the base of its fifth-generation architecture, the AndeStar™ V5. To meet the demanding requirements of today’s electronic devices, Andes delivers highly configurable and performance-efficient CPU cores. They come with full-featured integrated development environment and comprehensive software/hardware solutions to help designers innovate their SoCs in a shorter time to market. In 2019, the volume of SoCs Embedded with Andes CPUs surpassed the 1.5-billion mark. Andes Technology’s comprehensive RISC-V CPU families range from the entry-level 32-bit N22, mid-range 32-bit N25F/D25F/A25/A27 and 64-bit NX25F/AX25/AX27, to the high-end multicore A(X)25MP and vector processor NX27V. Coming soon is the superscalar 45 series.

Continue ReadingAndes Technology Steps Up to Premier Membership in RISC-V International; Greatly Expanding its U.S. R&D and Field Application Engineering Staffing

Andes Technology Announces over 5 Billion Cumulative Shipments of SoCs Embedded with Its CPU IP since Company Inception

SoC Shipments with Andes CPU IP Reached a Remarkable 1.5 Billion in 2019 Alone

HSINCHU, TAIWAN – March 31, 2020 – Andes Technology (TWSE: 6533), a leading supplier of high efficiency, low-power 32/64-bit RISC-V processor cores, announced a remarkable record of 1.5 billion annual SoC shipments containing its CPU IPs in 2019 at an annual growth rate of 50%. Since inception, cumulative shipments surpassed 5 billion. Applications in which Andes CPU IPs are embedded include audio, Bluetooth, gaming, GPS, machine learning, MCU, sensor fusion, SSD controllers, touch screen and TDDI controllers, USB 3.0 storage, voice recognition, Wi-Fi, wireless charger and more. 

Founded in 2005, Andes Technology celebrates its 15th anniversary this March. What started out as a small team is now an established leading RISC-V CPU IP provider with over 200 employees serving more than 300 customers worldwide. With the motto “Driving Innovations” in mind, in the past 15 years, Andes has devoted itself to providing professional solutions and technical support to help customers develop the best quality SoC designs. As more and more successful Andes customers enter mass production, the shipment volumes of Andes CPU IPs continue growing exponentially over the years. Hitting the milestone of more than 5 billion cumulative SoC shipments demonstrates customers’ long recognition of Andes’ product quality, innovative technologies, and world class support.

Andes President, Frankwell Lin said, “The cumulative SoC shipments containing our CPU IPs surpassed 5 billion, a major milestone showing the appreciation from customers of our high-quality products. With adoption of RISC-V rising, in 2019 it is the first time that the proportion of revenues from our V5 RISC-V processor series exceeded those from our previous proprietary V3 processor series. Our V5 RISC-V cores address a wide range of emerging applications including 5G, AI/machine learning, ADAS, AR/VR, blockchain, cloud computing, data centers, IoT, sensing, storage, security, wireless and so on. Once our customers begin mass production of RISC-V products, we believe they will bring Andes’ growth to the next level.”

Dr. Charlie Su, Andes CTO and Executive Vice President, also stated, “By driving innovations, Andes continues to launch a wide range of RISC-V processors, including the 22, 25, and the coming 27 and 45 series. Andes is the first CPU IP vendor to release commercial RISC-V cores with DSP and vector instruction extensions. These extensions provide the high performance demanded by the compute-intensive algorithms extensively being designed into today’s SoCs. As the product portfolio of Andes covers more and more applications, we continue offering different choices catering to the specific needs of customers to help them create the most competitive domain-specific solutions.”

Andes Technology has committed to promoting RISC-V CPU IPs. In 2019, the company became a Platinum founding member of the RISC-V Foundation (the RISC-V International Association now). Today, it broadened its diverse and powerful RISC-V processors to serve rapidly emerging applications. Andes maintains its promise to devoting more resources to the RISC-V ecosystem and bringing more processor solutions, enriching the RISC-V product line, and taking RISC-V to the mainstream globally.

Andes Solutions Update

Since the reveal of its first RISC-V CPU core in 2017, Andes continues to experience high demand for its RISC-V offerings in the high growth markets. Andes latest ground-breaking 27-Series Processor RISC-V IP, with its first ever RISC-V Vector Processing Unit, has also found strong demand in the high growth AR and VR market. One of Andes competitive advantage in the RISC-V market is its first-to-market implementations of RISC-V P- and V-extensions (DSP and vector, respectively) combined with Andes Custom Extensions™ (ACE). 

ACE enables customers to design RISC-V solutions that are tailored for their specific requirements. This affords customers the advantage of difficult-to-clone and differentiated solutions that are smaller, more power efficient, and cost competitive than other market offerings. Furthermore, ACE ensures that its customers’ customized CPUs get through the design process as easily as an off the shelf CPU core. Andes has released 11 RISC-V cores to serve the wide range of computing needs of its customers, and the R&D team will continue developing even more powerful RISC-V offerings in the future.

Continue ReadingAndes Technology Announces over 5 Billion Cumulative Shipments of SoCs Embedded with Its CPU IP since Company Inception

Andes Technology Takes the Lead in Launching RISC-V Total Solutions and Driving Industry-Academia Collaboration with over 120 Projects

Hsinchu, Taiwan – January 09, 2020 – Andes Technology (TWSE: 6533), a leading supplier of high efficiency, low-power 32/64-bit RISC-V processor cores, has cooperated with more than 70 universities worldwide to date, after signing the first contract of industry-academia cooperation with National Chiao Tung University (NCTU) in 2010. Andes continues to provide CPU IP AndesCore™ licensing, software development tool AndeSight™, and hardware development platforms to schools with licensing series from AndeStar V3 architecture to V5 version RISC-V processors. To promote sustainable development in academia, Andes Technology has actively invested various resources in colleges and universities for many years, including supporting schools with software/hardware equipment and participating establishment of joint laboratories with universities, etc. The total number of contracts with universities around the world is currently over 120. Andes believes in the concept of “technology comes from education” and hence has been working with various academic institutions for several years. It gives back to the academia through providing the most advanced RISC-V computing processor cores, SoC technology, complete training materials, professional teaching programs, practical industry experiences, unique certification exams, and many other technologies and services.

RISC-V draws increasing attention due to its market potential and future development with features such as open-source ISA, which is compact, modular and extensible. Many RISC-V enthusiasts in the industry and academia, whether in the United States, Europe, or Asia, are actively involved in developing an extensive range of RISC-V applications, which leads to a flourishing RISC-V ecosystem. With all 120 contracts, Andes provided the latest RISC-V software development tool, RISC-V ISA, debuggers, examples of project implementation, verification and performance analysis of algorithm to schools. In the course teaching section, National Tsing Hua University is the first one using the RISC-V software development tool AndeSight™ provided by Andes for compiler design courses, and further purchasing the RISC-V development platform Corvette F1 for teaching experimental courses and development of student projects. National Taiwan University’s Computer Science and Information Engineering department has also started to use AndeSight™ for compiler design courses.

In the cooperation of CPU IP Cores licensing, the team led by Wai-Chi Fang,  Professor in Department of Electronics Engineering (EE), NCTU, obtained the license of AndesCore™ V5 RISC-V N25 core computing processor through the cooperation. It is mainly used for security research and development. Currently, it has been successfully taped out at Taiwan Semiconductor Research Institute; Professor Chen-Yi Lee’s team in NCTU adopted Andes RISC-V DSP instruction extension core, to create a face recognition system with artificial intelligence, and published it at 2019 RISC-V Taiwan workshop. “We were surprised that a real-time face recognition system can effectively work with a single RISC-V digital signal processor and DSP-AI program development environment provided by Andes Technology. This means that in many emerging system applications and services, the platform can provide both low-cost and low-power solution, which is a big step forward in developing AIoT ecosystem”, Professor Lee said. Yier Jin, Professor at the University of Florida, US, used AndesCore™ A25 processor core for research projects of IoT platforms and adopted the FPGA platform ADP-XC7K160 for development and verification. Dr. Yier Jin said:” Glad to have the opportunity to use Andes RISC-V A25 processor core in our IoT platform project. IoT data computing is very focused on security and reliability, and A25 meets the needs. We hope to carry on more researches through this platform, especially from the security perspective. “

AI has led a worldwide technology trend. Andes RISC-V instruction set architecture features the flexibility to allow developers to quickly implement many creative designs in the field of AI and IoT. Its high-performance and low-power are the keys to success. At present, in addition to the real-time face detection of Professor Lee’s team from NCTU, the team of Professor Shanq-Jang Ruan from National Taiwan University of Science and Technology has also collaborated with Andes for AI to have deep learning accelerators using Andes Custom Extension™ (ACE) technology. With the ACE instructions, customers can add their own instructions to AndesCore™. Users only need to create an ACE description file and related concise Verilog file to generate CPU with extended instructions and related software toolchain in a few tens of seconds.

Frankwell Lin, President of Andes Technology, said: “Education is the foundation of industrial development. The huge reason why Silicon Valley in the United States has become a center of information technology is that it has close ties with the researchers and talents from industry-academia cooperation with neighboring higher education institutions. Andes Technology has similar advantage in place, located at Hsinchu Science Park, and close to first-class universities. We are also devoted to expanding the range and the number to sign the industry-academia cooperation projects with the world’s top universities. Through the long-term cooperation, we hope to achieve talent cultivation, interact with higher research institutes, and fulfill corporate social responsibilities. Andes Technology will continue to invest human and material resources to support the RISC-V industry-academia cooperation project. “

For more information about Andes RISC-V processors, click http://www.andestech.com/markets.php

About Andes Technology

Andes Technology Corporation is a public listed company with well-established technology and teams to develop innovative high-performance/low-power 32/64-bit processor cores and associated development environment to serve worldwide rapidly growing embedded system applications.

The company delivers the best super low power CPU cores, including the new RISC-V series with integrated development environment and associated software and hardware solutions for efficient SoC design. Up to the end of 2018, the cumulative volume of Andes-Embedded™ SoCs has reached 3.5 billion with 2018 alone contributing over 1 billion.

To meet the demanding requirements of today’s electronic devices, Andes Technology delivers configurable software/hardware IP and scalable platforms to respond to customers’ needs for quality products and faster time-to-market. Andes Technology’s comprehensive CPU includes entry-level, mid-range, high-end, extensible and security families to address the full range of embedded electronics products, especially for connected, smart and green applications. From 2017, Andes expands its product line to RISC-V processors and provides a total solution in V5 family cores, including N22, N25F/NX25F, D25F, A25/AX25, A25MP/AX25MP, A27/AX27/NX27V,  A45/D45/N45 and AX45/DX45/NX45.

For more information about Andes Technology, please visit

http://www.andestech.com/  

Continue ReadingAndes Technology Takes the Lead in Launching RISC-V Total Solutions and Driving Industry-Academia Collaboration with over 120 Projects

Andes Corvette-F1 N25 Platform Becomes one of the first RISC-V Platforms Qualified for Amazon FreeRTOS

San Jose, California, December 9th, 2019 – Andes Technology, a leading supplier of high-performance low-power compact 32/64-bit RISC-V CPU cores and a founding member of the RISC-V Foundation, today announced its Corvette-F1 N25 platform is one of the first RISC-V platforms qualified for Amazon FreeRTOS. Amazon FreeRTOS is an open source operating system for microcontrollers from Amazon Web Services (AWS) that makes small, low-power edge devices easy to program, deploy, secure, connect, and manage. Developers can take advantage of Amazon FreeRTOS features and benefits by using the RISC-V platform from Andes Technology.

“IoT, and AIoT, will be a big addressable market for RISC-V CPU,” said Dr. Charlie Su, CTO and Executive VP of Andes Technology. “By leveraging the advantages of Amazon FreeRTOS and Andes RISC-V platform, we can provide developers using Amazon FreeRTOS additional development platform choices and strengthen the Andes RISC-V IoT solutions for our customers.”

As more and more technologies have been deployed to the internet, the IoT market grows with a wide variety of diversified applications. The RISC-V Instruction Set Architecture (ISA) provides enhanced flexibility, extensibility, and scalability that can help generate new possibilities for the IoT and making it easier to design compact IoT hardware to take advantage of this growing market. By combining the RISC-V platform with solutions like Amazon FreeRTOS, AWS IoT Greengrass, and AWS IoT Core, Andes Technology can help developers to create comprehensive and competitive RISC-V-based IoT systems.


The Corvette-F1 N25 platform is a FPGA-based Arduino-compatible evaluation platform. It comes with a 32-bit RISC-V AndesCore™ N25 running at 60MHz, 4MB Flash, 256KB instruction SRAM and 128KB data SRAM, and AndeShape™ AE250 Platform IP with rich peripherals such as GPIO, I2C, PWM, SPI, and UART. It also contains an on-board wireless module supporting IEEE 802.11 b/g/n. For more information about Andes Corvette-F1 N25 platform, please visit http://www.andestech.com/en/products-solutions/andeshape-platforms/corvette-f1-n25/

Continue ReadingAndes Corvette-F1 N25 Platform Becomes one of the first RISC-V Platforms Qualified for Amazon FreeRTOS

Andes Technology and Deeplite, Inc. Join Forces To Deploy Highly Compact Deep Learning Models Into Daily Life

Hsinchu, Taiwan – December 06, 2019 – Andes Technology, a leading Asia-based supplier of high-performance low-power compact 32/64-bit RISC-V CPU cores and a founding Platinum member of the RISC-V Foundation, and Montreal based AI startup Deeplite, Inc., the creators of Lightweight Intelligence™ making deep learning AI models smaller, faster and more energy efficient, today announced the results of their joint collaboration to deploy highly optimized deep learning models on Andes RISC-V CPU cores based on AndeStar™ V5 architecture . 

The proliferation of smart devices like AI-enabled home assistants in recent years provides an ideal target platform for deploying highly compact deep learning models into daily life. These devices are designed to operate at both low power and low computation resources. To function effectively, a home assistant must be easy to use and respond to user requests in real-time. Today, due to the compute and power requirements of complex AI models, most smart devices must send user data and requests to the cloud to carry out AI processing then returning the results to the smart devices. 

Andes and Deeplite teamed up to enable human-machine interfaces like home assistants, to operate locally with little to no cloud connectivity required. The scenario is an embedded solution where a home assistant “wakes up” when it detects a person via a small camera.  The goal was to optimize a deep learning model running on Andes A25 and D25F that are the first commercial RISC-V cores with DSP SIMD ISA for low-cost edge AI applications.  The team started with a MobileNet model trained on a Visual Wake Words (VWW) dataset that was 13MB in size. Using Deeplite’s hardware-aware optimization engine automatically found, trained and deployed a new model less than 188KB in size and with only a 1% drop in accuracy. 

“We have more and more industry use cases where we see a need for embedded, optimized deep learning models running on our RISC-V cores such as A25 and D25F that have DSP instructions to accelerate deep learning algorithms,” said Dr. Charlie Su, CTO and Executive VP of Andes Technology. “Deeplite has provided a solution that can be leveraged both internally within Andes as well as for our customers to bring deep learning on Andes RISC-V CPU cores to resource-limited devices at the edge.”

“I am thrilled with the results of this collaboration! Not only has Deeplite delivered a 69x industry-changing deep learning optimization with minimal accuracy impact but we have done so by automating formerly manual techniques for neural architecture design that were time-consuming and error prone.” said Nick Romano, CEO of Deeplite, Inc. “What used to take weeks of expensive trial and error is now accomplished automatically in a few hours! Lightweight Intelligence™ by Deeplite and best of breed hardware from Andes are taking us one step closer to enabling AI in the things we use every day.”

By combining industry leading optimization by Deeplite with Andes’ state of the art hardware for use cases like voice recognition or person detection to meet microcontroller-level memory and compute requirements, device OEMs and application developers may offer users the benefit of keeping their data on-device, while still providing the real-time and seamless responses necessary for real-world AI everywhere.

To receive our white paper on this collaboration, please contact Davis Sawyer, cofounder and VP, Product at davis@deeplite.ai.

About Andes Technology

In only 14 years, Andes Technology Corporation is now a world class creator of innovative high-performance/low-power 32/64-bit processor cores and associated development environment to serve the rapidly growing global embedded system applications. Andes is also a founding Platinum member of the RISC-V Foundation and the first mainstream CPU vendor that adopted RISC-V as the base of its fifth-generation architecture, the AndeStar™ V5. In order to meet the demanding requirements of today’s electronic devices, Andes delivers highly configurable and performance-efficient CPU cores with a full-featured integrated development environment and comprehensive software/hardware solutions to help customers innovate their SoC in a shorter time frame. Since 2018, the yearly volume of Andes-Embedded™ SoCs has surpassed the 1-billion mark. Andes Technology’s comprehensive RISC-V CPU families cover from entry-level 32-bit N22, mid-range 32-bit N25F/D25F/A25 and 64-bit NX25F/AX25F, to high-end multicore A(X)25MP.

For more information, please visit https://www.andestech.com 

About Deeplite

Founded in 2018 and based in Montreal, Deeplite is an AI software company dedicated to enabling deep learning in the devices we use every day. Deeplite researches, designs and develops intelligent optimization software powered by reinforcement learning to make Deep Neural Networks (DNNs) faster, smaller and energy-efficient from cloud to edge computing. 

Deeplite has received many industry recognitions including being named a 2019 Canadian Innovation Exchange (CIX) Top20early company and the 2019 Innovation Award Quebec.  Deeplite is currently participating in both the MobilityXlab and L-Spark QNX autonomous vehicle accelerator programs. For more information please visit www.deeplite.ai

Continue ReadingAndes Technology and Deeplite, Inc. Join Forces To Deploy Highly Compact Deep Learning Models Into Daily Life

Andes 45-Series Expands RISC-V High-end Processors 8-Stage Superscalar Processor Balances High Performance, Power Efficiency, and Real-time Determinism with Rich RISC-V Ecosystem

San Jose, California, December 4th, 2019 – Andes Technology Corporation, the world leader in RISC-V CPU solutions, announces AndesCore™ 45-series CPU cores today. It is equipped with efficient superscalar pipeline to address a wide range of high-performance, power-sensitive and real-time embedded systems such as 5G, In-Vehicle Infotainment (IVI), Advanced Driver Assistance Systems (ADAS) and Solid State Disks (SSD).  Availability of the CPU cores to early adopted customers is scheduled from Q1, 2020. 

High-performance embedded systems have come to the fork of the road.  On one hand, customers have enjoyed the ecosystem of industry successful processors.  But they crave the freedom to go beyond the fixed instructions and microarchitecture platforms. The AndesCore 45-series is specifically designed to provide such solution. 

“The 45-series is an important milestone to high-performance space for Andes, this time with the RISC-V instruction set and all the momentum that comes with it,” said Andes President, Frankwell Lin. “Our licensees have asked us to bring our dual-issue processor expertise to the RISC-V cores, and I am glad our R&D team has come through again.”

Initially available in the 45-series will be the 32-bit A45/D45/N45 and 64-bit AX45/DX45/NX45, which benefit from Andes proven 25-series cores, respectively, supporting all of latest RISC-V specifications, subsystem level components, as well as ecosystem enablement from Andes’ 14-years of R&D development. The A-prefix supports Linux and scales up to four cores, N-prefix supports RTOS, while D-prefix supports RISC-V packed SIMD/DSP instructions (P-extension draft).  All 45-series cores employ in-order, 8-stage, dual-issue superscalar with careful memory pipeline designs to incorporate ECC without sacrificing clock speed, and the IEEE754-compliance single and double precision Floating Point Unit (FPU) could be selected.  Indeed, the AX45 core can deliver 1.2GHz at 28nm worst case PVT corner with ECC turned on, making it one of the most robust pipeline designs at this performance level.  The vastly superior pipelining also results in world-class 5.4 Coremark/MHz.  These cores are in-order processors to enhance real-time determinism for code execution.  When coupled with Andes Platform-Level-Interrupt-Controller (PLIC) with priority-based preemption, the 45-series cores are ideal for embedded applications where response times and determinism are critical.

The 45-series cores continue AndesCore™ strong heritage for rich processor subsystem design, starting with memory subsystem with local memory support and configurable instruction & data caches of varying sizes, and associativity.  Advanced branch prediction further improves processor performance with minimal power consumed.  Memory Management Unit (MMU) with configurable table sizes enables the A-prefix 45-series family to run Linux operating systems now fully supported in RISC-V community.  Most importantly, the 45-series family will be released with all of Andes existing RISC-V ecosystem partner solutions already enabled, from security solutions to system level modeling, and hardware debug/trace subsystems.

“While it’s gratifying to bring our years of high-performance processor experience to the 45-series RISC-V product family, it’s the ecosystem, partnership, and market momentum that’s truly exciting.” said Dr. Charlie Su. “A fast processor is nice, but partners and licensees trust us because we have delivered differentiated features, solutions, and enablement supports to help them get to revenue quickly.”

As with Andes 25-series family of processor cores now in production for two years, the 45-series family will support all existing Andes features such as PowerBrake, QuickNap™, WFI for additional power saving; StackSafe™ for stack overflow/underflow protection; CoDense™ for additional code density enhancement beyond RISC-V C-extension; and Andes Custom Extension™ (ACE) for user-defined instructions to realize domain-specific architecture. 

Pricing and Availability:

The 45-series family of cores will be available to early licensees from Q1, 2020.  Please contact Andes Sales at sales@andestech.com for configuration and pricing of the 45-series processors.

About Andes Technology

Fourteen years after starting from scratch, Andes Technology Corporation is now a world class creator of innovative high-performance/low-power 32/64-bit processor cores and associated development environment that serves the rapidly growing global market for embedded system applications. A founding Platinum member of RISC-V Foundation, Andes is the first mainstream CPU vendor that has adopted the RISC-V as the base of its fifth-generation architecture, the AndeStar™ V5. To meet the demanding requirements of today’s electronic devices, Andes delivers highly configurable and performance-efficient CPU cores with full-featured integrated development environment and comprehensive software/hardware solutions to help customers innovate their SoC in a shorter time to market. Since 2018, the yearly volume of SoCs Embedded with Andes CPUs has surpassed the 1-billion mark. Andes Technology’s comprehensive RISC-V CPU families range from the entry-level N22 (32-bit only) and mid-range 25-series, to the newly announced advanced 27-series and 45-series.

For more information, please visit https://www.andestech.com

Continue ReadingAndes 45-Series Expands RISC-V High-end Processors 8-Stage Superscalar Processor Balances High Performance, Power Efficiency, and Real-time Determinism with Rich RISC-V Ecosystem

Andes Presents Ground-Breaking 27-Series Processor at RISC-V Summit 2019

Configurable Vector Processor Enables Scalable Performance Beyond Any IP Core to Date Supported by High-Performance Memory Subsystems

Hsinchu, Taiwan and San Jose, California, December 4th, 2019 – Andes announces AndesCore™ 27-series CPU cores today and will present it at the RISC-V Summit.  The 27-series is the first licensable RISC-V core to deliver to a production licensee the RISC-V Vector instruction extension (RVV), and to sustain the memory bandwidth and efficiency Andes has also re-architected its memory subsystem.  Initial delivery of the CPU core has completed to Andes earliest licensee, with production release slated for Q1, 2020.  Dr. Charlie Su, Andes Technology CTO and EVP will unveil details of this ground-breaking product at the Summit. 

The advent of AI, AR/VR, computer vision, cryptography, and multimedia processing all require complex computation of large volume of matrix data.  Unlike other vendor’s advanced SIMD, which has a narrow range of performance dictated by their architecture control, the RVV specification envisions a powerful instruction set with scalable data sizes, flexible microarchitecture implementations, and leaves memory subsystem decisions open for system level optimization.  With the 27-series CPU cores, Andes delivers this unprecedented performance and flexibility to the RISC-V community and for the first time, enables RISC-V cores to fill the void in applications even other vendors have not been able to reach. 

“The 27-series marks yet another important milestone in both Andes and RISC-V journey, and I couldn’t be more proud of our R&D team for this achievement,” said Andes President, Frankwell Lin. “The RVV extension boldly takes RISC-V beyond any licensable processor core technology into the hottest markets today, and our licensee’s confidence in the R&D team enables Andes to be the first to deliver on this ambitious vision.  The team has worked together from specification to delivery in less than nine months.  It’s one of the most thrilling journey in Andes history.”

Initially available in the 27-series will be the 32-bit A27, and 64-bit AX27 and NX27V. They benefit from Andes proven 25-series cores, supporting the latest RISC-V specifications, subsystem level components, as well as ecosystem enablement from Andes’ 14-years of R&D development.  The A27 and AX27, tailored for applications running Linux, offer 50% higher memory bandwidth than its 25-series predecessors. The NX27V contains a Vector Processing Unit (VPU) which supports the RVV scalable vector instruction set, designed from the ground up to be a Cray-like full vectorization computation unit than the incremental growth from SIMD instructions which some advanced SIMD has evolved from.  As such, there is a full Vector Register File (VRF) of user-configurable number of elements per register.  Each vector can be arbitrary length, from as small as 64-bit to as large as 512-bit (VLEN) and all the way to 4096-bit by combining up to eight vector registers (LMUL).  It also allows each computation of integer, fixed point, floating point, and other AI-optimized representations to be any bit-width from 4 bits to 32 bits, and handles non-divisible last matrix elements in the same loop.  The 27-series VPU implements all of these capabilities, and has multiple functional units which are chainable, each can operate in independent pipelines to sustain the computational throughputs needed in critical kernel functions.  Fully configured, the VPU can achieve over 30x speedup measured by the key functions in MobileNets, a popular convolution neural networks (CNN).  Compared to the popular 128-bit scalar SIMD solution, the NX27V VPU offers 4 times more raw processing power per cycle with additional advantage due to the higher efficiency of vector instruction issuing.

“It’s exciting to see fourteen years of R&D investment all come together in one ambitious project,” said Dr. Charlie Su. “From the vector microarchitecture to the memory subsystem, and all the ecosystems required to enable our licensees, at whatever scale and scope the licensee deems appropriate, Andes has taken RISC-V users to the frontiers of these embedded applications.”

Indeed, the 27-series has vastly expanded its memory subsystem to keep up with the bandwidth required to sustain the computational rate of the VPU, all of which will benefit all customers in general, whether they use the VPU or not.  The 27-series now supports multiple outstanding memory accesses inflight so the scalar and vector processors both don’t have to wait for the data during cache misses.  In addition, cache pre-fetches allow the memory to prepare data in advance of processor’s needs, thus hiding potential cache misses.  Finally, Andes Custom Extension (ACE) interface has been expanded to provide instruction customization to speed up control path as well as to widen data path into the core.

 

Pricing and Availability:

The 27-series processor beta release has been delivered to Andes’ first licensee in early December, 2019, with production database release in Q1, 2020.  Please contact Andes Sales at sales@andestech.com for configuration and pricing of the 27-series processors.

About Andes Technology

Fourteen years after starting from scratch, Andes Technology Corporation is now a world class creator of innovative high-performance/low-power 32/64-bit processor cores and associated development environment that serves the rapidly growing global market for embedded system applications. A founding Platinum member of RISC-V Foundation, Andes is the first mainstream CPU vendor that has adopted the RISC-V as the base of its fifth-generation architecture, the AndeStar™ V5. To meet the demanding requirements of today’s electronic devices, Andes delivers highly configurable and performance-efficient CPU cores with full-featured integrated development environment and comprehensive software/hardware solutions to help customers innovate their SoC in a shorter time to market. Since 2018, the yearly volume of SoCs Embedded with Andes CPUs has surpassed the 1-billion mark. Andes Technology’s comprehensive RISC-V CPU families range from the entry-level 32-bit N22, mid-range 32-bit N25F/D25F/A25 and 64-bit NX25F/AX25F, to the high-end multicore A(X)25MP.

 

Continue ReadingAndes Presents Ground-Breaking 27-Series Processor at RISC-V Summit 2019

RISC-V Foundation Founding Member Andes Technology Turns Platinum

Leading RISC-V CPU IP provider deepens commitment to support the development of embedded computing and customized CPU

Hsinchu, Taiwan – December 03, 2019  –  Andes Technology Corporation (TWSE: 6533), a founding member of the RISC-V Foundation and the leading supplier of 32/64-bit embedded CPU cores with solutions serving in excess of 1-billion diversified SoCs yearly, today announced that it has upgraded its membership in the RISC-V Foundation to Platinum.

Andes Technology joined the RISC-V Foundation in 2016 as a founding member and brought its extensive experience in developing embedded CPU and supporting diversified applications to take RISC-V ISA to the next level. With more than 300 commercial licenses and cumulative shipments exceeding 4 billion SoCs, Andes is the first public CPU IP vendor with the market and technology expertise driving the open-source RISC-V instruction set architecture. Andes’ commitment to the RISC-V community is rooted on its strong belief on open source. It is a major contributor and maintainer of RISC-V open source software such as GNU, LLVM, uBoot, and Linux. Moreover, as the chair of the P-extension (Packed SIMD/DSP) Task Group and co-chair of Fast Interrupt Task Group, Andes continues its key role contributing architecture extensions to the RISC-V Foundation. In addition, Andes also regularly attends the global Technical Committee meetings to closely watch and contribute to other Task Groups.

Andes also participates in the RISC-V Foundation Marketing Committee and APAC Promotion Task Group to help drive RISC-V’s global expansion. The company has joined most every RISC-V workshop in Asia, EU, and the US, and one-day RISC-V roadshows in 15 cities around the world. It participates in important industry events, such as Embedded World, DAC, RISC-V Meetups and many more. In 2019, Andes has given more than 100 public presentations relating to RISC-V promotion. To further promote RISC-V, Andes produces the successful RISC-V CON series across Asia and Silicon Valley aiming to share market trends and leading technology development with RISC-V enthusiasts around the world.

“Andes’ unwavering commitment to RISC-V has continued to inspire and engage the broader ecosystem. The RISC-V Foundation is honored to work with Andes in accelerating momentum and adoption of RISC-V around the world,” said Calista Redmond, CEO of the RISC-V Foundation.

“’The Global AI in IoT market is expected to reach $21.1 billion by 2026 growing at a CAGR of 27.1 percent during the forecast period,’” according to Esticast Research. Choosing a professional CPU IP provider is the key to the development of purpose-built SoCs and faster time to market to address this enormous opportunity. The open, compact, modular and extensible RISC-V ISA together with its extensive ecosystem is the perfect choice for these embedded SoCs,” said President of Andes Technology, Frankwell Lin. ”We are thrilled to upgrade our membership to Platinum and work even closer with the RISC-V community to solve application and persistent computing challenges for the embedded ecosystem.”

“We joined the RISC-V Foundation because the RISC-V ISA aligned almost perfectly with our original self-developed ISA. Our customers can continue to use their AndeSight™ IDE (Integrated Development Environment) simply by upgrading, and we can bring our years of experience in processor IPs and embedded systems to our new RISC-V users and customers.” said Dr. Charlie Su, CTO and Executive VP of Andes Technology. “AndesCore™ runs from one to more than 1,000 cores in a single SoC in which Andes provides a wide variety of solutions to empower our customers. By upgrading to a Platinum Member Representative, we will devote more resources to the RISC-V ecosystem and continuously bring more processor solutions to market, enriching the RISC-V product line. This helps drive our vision of Taking RISC-V Mainstream.”

About Andes Technology

After 14-year effort starting from scratch, Andes Technology Corporation is now a world class creator of innovative high-performance/low-power 32/64-bit processor cores and associated development environment to serve the rapidly growing global embedded system applications. Andes is also a founding Platinum member of RISC-V Foundation and the first mainstream CPU vendor adopted the RISC-V as the base of its fifth generation architecture, the AndeStar™ V5. In order to meet the demanding requirements of today’s electronic devices, Andes delivers highly configurable and performance-efficient CPU cores with full-featured integrated development environment and comprehensive software/hardware solutions to help customers innovate their SoC in a shorter time frame. Since 2018, the yearly volume of Andes-Embedded™ SoCs has surpassed the 1-billion mark. Andes Technology’s comprehensive RISC-V CPU families cover from entry-level 32-bit N22, mid-range 32-bit N25F/D25F/A25 and 64-bit NX25F/AX25F, to the high-end multicore A(X)25MP.

For more information, please visit https://www.andestech.com

Continue ReadingRISC-V Foundation Founding Member Andes Technology Turns Platinum

Secure-IC and Andes Technology jointly provide cybersecurity enhanced RISC-V cores

【Hsinchu, Taiwan】– November 13, 2019 – Today, Secure-IC, the embedded security solutions provider from France specialized in embedded cybersecurity to protect against attacks, enters a strategic partnership with Andes Technology Corporation (TWSE: 6533), a founding member of the RISC-V Foundation and the leading supplier of 32/64-bit embedded CPU cores with solutions serving in excess of 1-billion diversified SoCs yearly. This strategic partnership consists in delivering a secure high performance processor. Secure-IC’s Cyber Escort Unit™ associated with Andes RISC-V processors ensures a protection against both Physical and Cyber Attacks such as buffer overflow, fault injection attack, instruction skip or replacement and is compliant with high security levels (EAL) regarding the Common Criteria Certification and the PP0084 Protection Profile. In addition, the solution is fully aligned with the DARPA System Security Integrated Through Hardware and Firmware (SSITH) program.

AndesCore™ RISC-V processors, based on AndeStar™ V5 architecture, currently include the ultra-compact 32-bit N22 for entry-level microcontrollers and deeply-embedded protocol processing, the 32/64-bit N25F/NX25F for high-speed control tasks or floating-point intensive applications, the 32-bit D25F for signal processing applications, the A25/AX25 for Linux-based applications and the A25MP/AX25MP for cache coherence multi-core applications. To make them best fit application requirements, the 25-series processors offer optional key features such as dynamic branch prediction, instruction and data caches, local memories, floating point unit, and DSP extension. Leveraging its long track record of CPU technologies, Andes delivers its RISC-V processors with leading performance efficiency, and many advanced features such as StackSafe™ for hardware stack protection, CoDense™ for code size compression, and PowerBrake for power management. Moreover, Andes RISC-V cores are available with a rich set of system level configuration options such as Physical Memory Protection (PMP) and Platform-Level Interrupt Controller (PLIC).

The Secure-IC’s Cyber Escort Unit is designed to fill the security gap between software cybersecurity and hardware by escorting step by step the program execution to achieve high execution performance in a secure way, allowing real-time detection of zero-day attacks. Unique on the market, this product builds the foundation for hardware-enabled cybersecurity. It is the only tool on the market that comprises technologies for detecting and deceiving cyberattacks. This technology acts on-the-fly. Precisely, Cyber Escort Unit (Cyber EU in short) is a two-fold technology aiming to protect against four threats:

  1. Return oriented programming (ROP), Jump Oriented Programming (JOP): The attacker reuses chunks of code to assemble a malicious program as a patchwork.
  2. Stack Smashing, by exploiting a buffer overrun or integer under-or-overflow etc.: the attacker crafts some fake stack frames in order to change the program context.
  3. Executable Code Modification, overwrite: the attacker manages to change the genuine program into a malicious program.
  4. Control Flow hijacking: the attacker manipulates the program so that it calls an illicit function, or it takes an illicit branch.

Secure-IC’s solution is deterministic in timing and suitable for real-time application, such as mission-critical applications (e.g., safety requirements in automotive industry) & also suitable for cyber-physical systems, i.e., detecting issues irrespective they arise from physical alteration or cyber-attack.

“Cybersecurity becomes a real challenge because there are many connected devices, and attackers are becoming more and more destructive,” said Dr. Charlie Su, CTO and Executive VP of Andes Technology. “We are very pleased to work with Secure-IC to provide the excellent cybersecurity solution to help our customers design robust IoT SoCs. With the integrated platform and FPGA demo ready solution of industry-leading Cyber Escort Unit from Secure-IC and the RISC-V processors from Andes, SoC designers can easily prevent hostile attacks from the outside world with outstanding performance and network security.”

Secure-IC CEO, Hassan Triqui said, “It is a pleasure to integrate our Cyber Escort Unit solution with Andes RISC-V processor. The integration of Cyber Escort Unit with Andes solution provides to customer a secure and high performance processor that protects the systems against security and safety threats. ”

Secure-IC flagship IP is the “Securyzr”, a root-of-trust solution for ensuring device security and offering security services (such as authentication, life cycle management, remote configuration and cloud on boarding). This security subsystem can embed a dedicated processing unit based on a standard or cybersecurity-enhanced AndesCore™ V5 processor. The Securyzr using Cyber Escort Unit-security enhanced AndesCore offers a resilience against various attacks such as Side Channel Attack, Fault Injection Attack and Cyber Attack.

About Andes

After 14-year effort starting from scratch, Andes Technology Corporation is now a world class creator of innovative high-performance/low-power 32/64-bit processor cores and associated development environment to serve the rapidly growing global embedded system applications. Andes is also a founding member of RISC-V Foundation and the first mainstream CPU vendor adopted the RISC-V as the base of its fifth generation architecture, the AndeStar™ V5. In order to meet the demanding requirements of today’s electronic devices, Andes delivers highly configurable and performance-efficient CPU cores with full-featured integrated development environment and comprehensive software/hardware solutions to help customers innovate their SoC in a shorter time frame. Since 2018, the yearly volume of Andes-Embedded™ SoCs has surpassed the 1-billion mark. Andes Technology’s comprehensive RISC-V CPU families cover from entry-level 32-bit N22, mid-range 32-bit N25F/D25F/A25 and 64-bit NX25F/AX25F, to high-end multicore A(X)25MP.

For more information, please visit https://www.andestech.com

About Secure-IC

Secure-IC has established a thought leadership position in the security world.

Secure-IC sets itself apart by accompanying customers along the IC design process by providing best in class protection embedded Secure Elements and security IP cores, security evaluation solutions & consulting services to reach the best available certification required for different markets.

Combining a full set of analysis platforms with best of breed set of security technologies & backed by almost 40 families of international & global patents, Secure-IC is considered a leader in cyberspace security embedded systems.  Secure-IC protects companies against attacks and guarantees at each stage of the design process that an optimal security level is reached.  The best of breed technologies that are provided stem from the company’s commitment to the research community, as a spin-off from Telecom Paris Tech University, in order to foresee future major threats, tackle problems with innovative solutions & empower the intricate work of the industry standardization bodies.  The company provides Silicon proven technology, pioneering in AI for embedded security, post quantum & hybrid, and state-of-the-art synthesis of attacks/ countermeasures.   The embedded security system lines can be better recognized as Threat Protection (A combination of smart units & expertise results), Threat Analysis (Ready to use, pre & post silicon & SW analysis platforms) and Think Ahead (the next steps towards all security challenges).

For more information about Secure-IC solution, click http://www.secure-ic.com  

Continue ReadingSecure-IC and Andes Technology jointly provide cybersecurity enhanced RISC-V cores

Andes Technology and Tiempo Secure Announce Strategic Partnership to Enhance RISC-V Platform Security up to CC EAL5+ Certification

HSINCHU (Taiwan) and GRENOBLE (France) , October 1st, 2019 Andes Technology Corporation, a leading supplier of outstanding efficiency, low-power, high performance 32/64-bit embedded CPU cores, including a broad family of RISC-V cores, has entered into a strategic partnership with Tiempo Secure, a unique supplier of ISO/IEC 15408 standard CC (Common Criteria) EAL5+ (Evaluation Assurance Level) grade secure element IP, to bring the RISC-V based security solution up to CC EAL5+ certification.

The rise of IoT is driving serious concern about security, including at the edge device level. According to recent Ericsson research, by 2024, there will be more than 22 billion connected IoT devices. While security based from separation mechanism is commonly deployed, it is admitted that there is some limitation in term of security certification. Furthermore, security integration into the IoT ecosystem could become complex.

The alternative is to enable security from a tamper resistant and certified hardware as a security enclave (Secure Element IP) into the MCU or SoC design.

Tiempo Secure has developed a Secure Element IP (TESIC) as a hard macro integrating CC EAL5+ grade state-of the-art security countermeasures and security sensors against side channel and intrusion attacks. The integration of this Secure Element IP into a RISC-V SoC will bring the security of this SoC up to CC EAL5+ security, without compromising on power consumption.

“Andes Technology offers RISC-V based ultra-compact processor with the outstanding performance and low power consumption available on the market,” said Dr. Charlie Su, CTO and Executive VP of Andes Technology. “Integrating Tiempo Secure’s CC EAL5+ security enclave into AndesCore N22 solution will now allow our customers to address the most security critical applications on the IoT market.”

“By working with Andes Technology we’re able to dramatically enhance the security that developers need to protect their IoT ecosystems based on RISC-V,” said Serge Maginot, CEO of Tiempo Secure. “The plug-and-play integration of TESIC, our CC EAL5+ grade Secure Element IP, into the RISC-V cores of Andes Technology will enable RISC-V developers to easily integrate certified security features, such as secure boot, secure firmware update or iUICC stack, into their system.”

Once the Secure Element IP from Tiempo Secure is embedded into the RISC-V based AndesCore N22 designed by Andes Technology, the whole system can pass the highest level of security certification, including CC EAL4+/EAL5+ PP0084 and FIPS 140-2. It also solves the problem of security integration into the IoT ecosystem.

About Andes Technology

Andes Technology Corporation is a world class creator of innovative high-performance/low-power 32/64-bit processor cores and associated development environment to serve the rapidly growing global embedded system applications. The company delivers superior low power CPU cores, including the comprehensive RISC-V V5 family of processor cores, with integrated development environment and associated software/hardware solutions for efficient SoC design. Up to the end of 2018, the cumulative volume of Andes-Embedded™ SoCs has reached 3.5 billion with 2018 alone contributing over 1 billion. Andes Technology’s comprehensive CPU line includes entry-level, mid-range, high-end, extensible and security families. For more information, please visit www.andestech.com

About Tiempo Secure

Tiempo Secure is an independent company founded by semiconductor industry experts having unique experience in the development of secure microcontrollers and embedded secure software. The company has already designed and certified Common Criteria EAL5+ and EMVCo secure microcontroller chips, available in contact and dual interface mode, for Government ID and High-end Banking applications. Tiempo Secure is now offering CC EAL5+ proven/certification-ready Secure Elements for the IoT market, either as companion chips or as hard IP macros that are easy to integrate into application/SoC chips, allowing the customer chips to pass CC EAL5+ and other security standard certification.

The company is headquartered in Montbonnot, near Grenoble, France. More information can be found at www.tiempo-secure.com

Continue ReadingAndes Technology and Tiempo Secure Announce Strategic Partnership to Enhance RISC-V Platform Security up to CC EAL5+ Certification