Andes Custom Extension™ (ACE) Supports AndesCore™ 45-Series Processors to Provide Flexible Acceleration

Hsinchu, Taiwan – March 23, 2023 – Andes Technology, a leading supplier of high-performance, low-power, and extensible 32/64-bit RISC-V processor cores and Founding Premier member of RISC-V International, announces that an updated version of the powerful Andes Custom Extension™ (ACE) technology now supports the AndesCore™ 45-series processors – the single-core N45/D45/NX45/A45/AX45 and the multi-core A45MP/AX45MP. In addition, the advanced ACE features ACE-RVV and Andes Streaming Port will work with the AndesCore™ AX45MPV, which is the latest member of the 45-series processors with up to 1024-bit Vector Processing Unit (VPU).

With an in-order, 8-stage, dual-issue superscalar pipeline, the AndesCore™ 45-series processors offer strong processing performance for companies to develop high-performance solutions for a wide range of applications in 5G, automotive, AIoT etc. Similar to the AndesCore™ 25 and 27-series processors, the 45-series processors now work with the Andes Custom Extension™ (ACE) to realize domain-specific architecture designs with custom instructions support.

Through the ACE framework, SoC designers are able to design custom instructions and the corresponding custom logic to extend the AndesCore™ processors. The Andes COPILOT is a set of powerful tools to generate all the necessary components including intrinsic functions, processor RTL module and support for simulator, debugger, and compilation tools to support the custom instructions. The designers write an ACE script to describe the instruction semantics and concise Verilog RTL code to describe the custom logic. These are then fed into the COPILOT to generate all the outputs. 

The new version COPILOT v6 provides designers access to enhanced features of ACE such as ACE pipelining, background processing, and grouping functions. In the pipelined ACE engine, many ACE instructions are processed in different stages simultaneously. One instruction can complete every cycle when there is no dependence on resources and data. In this way, ACE pipelining offers a significant performance increase. Running ACE instructions in the background decouples their execution from the processor pipeline. This permits the processor pipeline to continue to execute younger instructions, including ACE instructions, without waiting for the completion of older ACE instructions. As a result, overall performance is improved, especially when there are long-latency ACE instructions. Grouping functions allows specifying one or multiple instructions as an instruction group, synchronization group, or a status group. ACE instructions in different instruction groups can be executed simultaneously to improve the overall ACE execution performance.

To further enhance the custom instructions design flexibility, the latest COPILOT has special support for SoC with embedded FPGA, where one or more 45-Series cores are hardened to connect via ACE interfaces to the embedded FPGA, which is ready for post-silicon custom extensions. COPILOT can generate clock domain crossing logic for the hardened part of the chip. The embedded FPGA architecture enables the capability of changing custom instructions for any purpose, such as fixing design issues or adding more innovative instructions.

“Introduction of AndesCore 45-series processors is a major milestone of Andes RISC-V processor development. This class of CPU brings best performance, power efficiency and rich features that our users will value,” said Dr. Charlie Su, President and CTO of Andes Technology. “The 45-series processors are great products in their own right and users can now use the latest ACE to bring a higher degree of customization in their designs.”

The new generation of Andes Custom Extension™ for AndesCore™ 45-series single-core N45/D45/NX45/A45/AX45 and multi-core A45MP/AX45MP is available now. To learn more about ACE’s powerful capabilities, please contact Andes Technology for more information.

About Andes Technology
Eighteen years in business and a Founding Premier member of RISC-V International, Andes is a publicly listed company (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099) and a leading supplier of high-performance/low-power 32/64-bit embedded processor IP solutions, and the driving force in taking RISC-V mainstream. Andes’ fifth-generation AndeStar™ architecture adopted the RISC-V as the base. Its V5 RISC-V CPU families range from tiny 32-bit cores to advanced 64-bit cores Out of Order multi-cores with DSP, FPU, Vector, Linux, superscalar, and/or multicore capabilities. By the end of 2022, the cumulative volume of Andes-Embedded™ SoCs has surpassed 12 billion.

For more information, please visit https://www.andestech.com. Follow Andes on LinkedIn, Facebook and YouTube! 

Contact us
Andes Technology Corporation
sales@andestech.com | +886 3 572 6533

Continue ReadingAndes Custom Extension™ (ACE) Supports AndesCore™ 45-Series Processors to Provide Flexible Acceleration

ASUS IoT Announces Tinker V, First RISC-V single-board computer (SBC) from ASUS IoT embraces open-source architecture for industrial IoT developers

KEY POINTS

●       First ASUS IoT RISC-V SBC: 64-bit processor embraces open-source RISC-V architecture to deepen diversity and flexibility for IoT developers

●       Ideal for industrial IoT: Linux Debian and Yocto support, rich connectivity, assured longevity and reliable, trusted technical support

●       Fast-growing ecosystem: ASUS IoT collaborates with Renesas and Andes to accelerate adoption of RISC-V and deployment in industrial IoT applications

 

TAIPEI, TAIWAN — March 14, 2023 — ASUS IoT, the global AIoT solution provider, today announced the all-new Tinker V — a versatile single-board computer (SBC) powered by a 64-bit RISC-V-based processor, which supports both Linux Debian and Yocto operating systems. Tinker V packs features rich connectivity into a compact Pico-ITX form factor, and pairs assured longevity with reliable support, making it the ideal choice for diverse IoT and gateway applications.

 

Embracing open-source RISC-V architecture for enhanced IoT developer choice and flexibility

The RISC-V processor in Tinker V employs the open-source Instruction Set Architecture (ISA), based on Reduced Instruction Set (RISC) principles. Compared with traditional x86 and Arm platforms, the defining benefit of RISC-V is that ISA is open source. Both individual developers and enterprises can change, optimize and deploy freely based on the RISC-V architecture — bypassing licensing and copyright fees. The launch of Tinker V, based on RISC-V, represents ASUS IoT’s ongoing commitment to accelerating IoT technologies, providing convenient and efficient environments for people everywhere.

 

Ideal for industrial IoT applications

The all-new Tinker V SBC is specially designed to run Linux Debian and Yocto. Featuring an ultra-compact size, it provides impressive power, comprehensive functionality and rich connectivity — making it the perfect choice for a diverse range of industrial IoT applications. Specially, Tinker V is equipped with a Renesas RZ/Five MPU, which incorporates the RISC-V AndesCore™ AX45MP single-core supporting 1.0 GHz operating frequencies. It is also engineered with a broad spread of peripheral connectors for industrial use, including GPIO, micro-USB, dual gigabit Ethernet, a pair of CAN bus interfaces and two RS232 COM ports. It also benefits from 1 GB of built-in RAM and an optional 16 GB eMMC, while supporting a wide range of operating temperatures from as low as -20°C to as high as 60°C.

 

Strong collaboration fosters the fast-growing RISC-V ecosystem

Commenting on the launch of Tinker V, Shigeki Kato, Vice President of Renesas’ Enterprise Infrastructure Business Division said: “We are thrilled to collaborate with ASUS and witness how our general-purpose RZ/Five MPU can contribute to the expansion of RISC-V in IoT systems. ASUS has been instrumental in integrating our device in the Tinker V SBC and we look forward to introducing more comprehensive RISC-V-based MPU solutions to our customers through our collaboration.”

 

Dr. Charlie Su, President and CTO of Andes Technology, added: “Andes has collaborated with ASUS IoT for the exciting Tinker V product. This powerful single-board computer employs the Andes AX45MP, and I look forward to seeing more devices from innovators in the global industrial market embedded with Andes’ advanced RISC-V processor families.”

 

With the purchase of Tinker V, customers receive the assurance of at least five years of support from ASUS IoT, and dedicated on-site technical support is available to shorten customer development cycles and accelerate application deployment.

 

AVAILABILITY & PRICING

ASUS IoT Tinker V samples will be available in Q2. Please contact your local ASUS representative for further information.

 

About ASUS IoT

ASUS IoT is a sub-brand of ASUS dedicated to the creation of incredible solutions in the fields of AI and IoT. Our mission is to become a trusted provider of embedded systems and partner to the wider AIoT solutions ecosystem. ASUS IoT strives to deliver best-in-class products and services across diverse vertical markets, and to partner with customers in the development of fully integrated and rapid time-to-market applications that drive efficiency — providing convenient, efficient and secure living and working environments for people everywhere.

 

About ASUS

ASUS is a global technology leader that provides the world’s most innovative and intuitive devices, components and solutions to deliver incredible experiences that enhance the lives of people everywhere. With its team of 5,000 in-house R&D experts, ASUS is world-renowned for continuously reimagining today’s technologies for tomorrow, garners more than 11 awards every day for quality, innovation and design, and is ranked among Fortune’s World’s Most Admired Companies.

 

About Andes Technology

Eighteen years in business and a Founding Premier member of RISC-V International, Andes is publicly-listed company (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099) and a leading supplier of high-performance/low-power 32/64-bit embedded processor IP solutions, and the driving force in taking RISC-V mainstream. Andes’ fifth-generation AndeStar™ architecture adopted the RISC-V as the base. Its V5 RISC-V CPU families range from tiny 32-bit cores to advanced 64-bit
Out-of-Order processors with DSP, FPU, Vector, Linux, superscalar, and/or multi/many-core capabilities. The annual volume of Andes-Embedded SoCs has exceeded 3 billion in 2021 and continues to rise. By the end of 2022, the cumulative volume of Andes-Embedded™ SoCs has surpassed 12 billion. For more information, please visit https://www.andestech.com. Follow Andes
on LinkedIn, Facebook, Weibo, Twitter, Bilibili  and YouTube! 

 

Media Contact:

Andes Technology

Jonah McLeod

Tel: +1 510 449 8634 

Email: Jonahm@andestech.com

ASUS

Gloria Hung

Email: gloria_hung@asus.com

Continue ReadingASUS IoT Announces Tinker V, First RISC-V single-board computer (SBC) from ASUS IoT embraces open-source architecture for industrial IoT developers

Andes Technology’s N25F RISC-V Processor Enables Superior Immersive Scenarios for ASPEED Technology’s Powerful Image Stitching SoC AST1230

HSINCHU, TAIWAN – March 07, 2023 – Andes Technology (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099) , a leading supplier of high-efficiency, low-power 32/64-bit RISC-V processor cores and founding premier member of RISC-V International, today announced that its AndesCore™ N25F Processor has been adopted by ASPEED’s latest Cupola360 Spherical Image Processor AST1230. The 5-stage pipelined high-performance N25F can operate at high frequencies and is the key to enable ASPEED to design its Cupola360 in-camera image stitching solution for outstanding 360-degree immersive experiences.

The AndesCore™ N25F is a 32-bit CPU IP core based on the AndeStar™ V5 architecture. With an optimized 5-stage pipeline design, it can deliver leading per-MHz performance with excellent energy efficiency. It supports both single- and double-precision floating point and bit-manipulation instructions. These instructions are conducive to accelerating audio codec and image processing algorithms. The N25F has various optional features as well, such as branch prediction for efficient branch execution, Instruction and Data caches, Local Memories for low-latency and predictable accesses, ECC for L1 memory soft error protection, and Andes Custom Extension™ (ACE) for accelerating custom instructions. The N25F also has convenient features to support SoC and system-level development like vectored interrupts to handle various types of system events, AXI 64-bit or AHB 64/32-bit bus interface, PowerBrake, QuickNap™ and WFI mode for low power and power management, and JTAG debug interface to facilitate software development.

ASPEED’s Cupola360 Spherical Image Processor AST1230 is designed with its innovative hyper-stitching® technology specifically for 360-degree images. It features a powerful image signal processor (ISP), a smart layout processing engine and extraordinary processing power for on-chip real-time image stitching. Moreover, AST1230 is capable of processing up to 8K2K Ultra HD video at 30fps with 48M pixels CMOS sensor inputs. With its image stitching capability, high level programmable audio DSP, exceptional performance and thermal efficiency, AST1230 perfectly meets the growing need for a variety of immersive scenarios, such as manufacturing, public utilities, retail, education and training, etc.

“With the unique feature of real-time image stitching, ASPEED’s Cupola360 Spherical Image Processor AST1230 allows users to access large-scale, optically perfect and ultra-high resolution panoramic views seamlessly and instantly,” said CJ Hsieh, COO of ASPEED. “The N25F enables us to create a next-generation approach for the market of smart 360-degree scenarios, or ImmersiveX as we call it. By creating a live digital twin with 360-degree cameras powered by AST1230, ASPEED’s Cupola360 solution reinvents immersive experiences, making them more interactive and engaging. It’s perfect for immersive applications including virtual factory tour, inspection and audit, shopping, house showing, learning and training, and so many more.”

“The AndesCore™ N25F core offers efficient performance and flexible configuration, which makes it an excellent choice for high-speed control and floating-point processing applications such as video and image processing. We are excited that our compact yet powerful RISC-V core serves as the main processor of ASPEED’s AST1230,” said Andes CTO and President, Dr. Charlie Su. “We fully appreciate working with ASPEED to provide advanced features and superior experience for the ever-growing markets of 360-degree video communication.”

About Andes Technology
Eighteen years in business and a Founding Premier member of RISC-V International, Andes is a publicly-listed company (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099) and a leading supplier of high-performance/low-power 32/64-bit embedded processor IP solutions, and the driving force in taking RISC-V mainstream. Andes’ fifth-generation AndeStar™ architecture adopted the RISC-V as the base. Its V5 RISC-V CPU families range from tiny 32-bit cores to advanced 64-bit Out-of-Order processors with DSP, FPU, Vector, Linux, superscalar, and/or multi/many-core capabilities. The annual volume of Andes-Embedded SoCs has exceeded 3 billion in 2021 and continues to rise. By the end of 2022, the cumulative volume of Andes-Embedded™ SoCs has surpassed 12 billion. For more information, please visit https://www.andestech.com. Follow Andes on LinkedIn, Facebook, Twitter and YouTube! 

Continue ReadingAndes Technology’s N25F RISC-V Processor Enables Superior Immersive Scenarios for ASPEED Technology’s Powerful Image Stitching SoC AST1230

Andes and IAR Together Enable Leading Vendor ILITEK to Accelerate the Development of its ISO 26262 Ready TDDI SoC ILI6600A

The joint Functional Safety solution from Andes and IAR helps ILITEK develop its High-Performance Touch and Display Driver Integration (TDDI) SoC

Hsinchu, Taiwan and Uppsala, Sweden— Feb 15, 2023— Andes Technology (TWSE:6533) and IAR together announce that ILITEK’s Touch and Display Driver Integration (TDDI) SoC, ILI6600A, adopts the Andes N25F-SE ISO 26262 certified V5 RISC-V CPU core, and the IAR certified Embedded Workbench toolchain for RISC-V, to support Automotive Functional Safety in its state-of-the-art SoC. ILI6600A is a highly integrated Amorphous/ LTPS/ Oxide TFT LCD driver with In-Cell touch controller. The joint solution from Andes and IAR is ISO 26262-certified with robust design methodology. It can help accelerate time-to-market for customers by shortening the rigorous certification process.

The LCD driver in ILI6600A supports up to 3 chips cascading and provides the number of colors up to 16.7M. Its IIE (Impressive Image Enhancement) function can achieve high-quality display and visual experience. The touch panel controller of ILI6600A uses a 32-bit high-performance single-cycle instruction-set MCU. With its built-in high-speed and high-performance hardware-accelerated computing modules, it provides superior data processing capabilities. With ILITEK’s driver technology and algorithms, the touch controller brings excellent user experience performance, strong anti-noise ability and high signal-to-noise ratio.

ILI6600A adopts the AndesCore™ N25F-SE, the world’s first ISO 26262 full compliance RISC-V CPU. As a Safety Enhancement edition of N25F, one of the bestselling RISC-V cores, the N25F-SE is designed for Automotive Functional Safety to prevent systematic failures as well as random hardware failures. IAR Embedded Workbench for RISC-V is a certified integrated development environment including the powerful IAR C/C++ Compiler and a comprehensive debugger. The combined solution and expertise of the two companies provide their customers with best-in-class performance and safety for automotive applications.

“The ILI6600A is our first ISO 26262 ASIL B ready product which provides robust, real-time and certified fail detection functions. Its higher SNR makes excellent touch panel performance and brings perfect user experience. Our engineering resource will provide in-time, on-site service. Also, ILI6600A has remote AI tuning tools which has been built with plenty TDDI project experience for customers. We are happy to partner with Andes and IAR on our automotive TDDI SoC solution to address the increasing demand for in-vehicle display devices with higher resolution,” said Luen Wey, CEO of ILI Technology Corp. “ILI6600A AFE can scan up to 960ch touch sensors and supports both of LongV and LongH scan. Moreover, the ILI6600A also supports virtual touch key’s and Knob functions. The most important part of automotive application, ILI6600A already passed the automotive ESD, EMI and EMS tests and will be an AEC-Q100 grade 2 qualified product soon. With high performance and low power consumption as well as necessary safety features, Andes RISC-V N25F-SE is the ideal processor to help ILI6600A meet its design goal.”

“We are thrilled to collaborate with IAR to support ILITEK on the product development of automotive TDDI SoC. With the N25F-SE, we ensure customers can leverage our ISO 26262 certified CPU IP and safety package in their product certification process. ILITEK has licensed several Andes V3 CPUs, the generation before its RISC-V compliant V5 cores. Their continued licensing and designing of latest Andes CPU IP into their SoC speaks a lot about ILITEK’s recognition of Andes CPU quality across multiple generations,” said Dr. Charlie Su, President and CTO of Andes Technology. “Andes is the first ISO 26262 certified RISC-V CPU IP company. We have established the ISO 26262 certified development process for automotive processor cores up to ASIL-D. With the certified development process in place, we are ready to support the automotive supply chain with the roadmap of our ISO 26262 functional safety certified RISC-V cores.”

“It’s great to see how IAR’s partnership with Andes is helping ILITEK in ensuring functional safety in their TDDI products. RISC-V technology continues to move fast forward and break new ground for innovations, and we will continue to drive change in the industry by supporting both the ecosystem as well as customers with professional development tools,” said Anders Holmberg, CTO of IAR.

The functional safety edition of IAR Embedded Workbench for RISC-V is certified by TÜV SÜD according to ten different standards, including ISO 26262. Along with strong technology, IAR offers guaranteed support for the sold version for the longevity of the customer support contract, validated service packs and regular reports of known deviations and problems.

Editor’s Note: IAR, IAR Embedded Workbench, Embedded Trust, C-Trust, C-SPY, C-RUN, C-STAT, IAR Visual State, IAR KickStart Kit, I-jet, I-jet Trace, I-scope, IAR Academy, IAR, and the logotype of IAR are trademarks or registered trademarks owned by IAR AB. All other product names are trademarks of their respective owners.

 

About Andes Technology

Eighteen years in business and a Founding Premier member of RISC-V International, Andes is publicly-listed company (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099) and a leading supplier of high-performance/low-power 32/64-bit embedded processor IP solutions, and the driving force in taking RISC-V mainstream. Andes’ fifth-generation AndeStar™ architecture adopted the RISC-V as the base. Its V5 RISC-V CPU families range from tiny 32-bit cores to advanced 64-bit Out-of-Order processors with DSP, FPU, Vector, Linux, superscalar, and/or multi/many-core capabilities. The annual volume of Andes-Embedded SoCs has exceeded 3 billion in 2021 and continues to rise. By the end of 2022, the cumulative volume of Andes-Embedded™ SoCs has surpassed 12 billion. For more information, please visit https://www.andestech.com. Follow Andes on LinkedIn, Facebook, Weibo, Twitter, Bilibili  and YouTube! 

About IAR

IAR provides world-leading software and services for embedded development, enabling companies worldwide to create the products of today and the innovations of tomorrow. Since 1983, IAR’s solutions have ensured quality, reliability, and efficiency in the development of over one million embedded applications. The company is headquartered in Uppsala, Sweden, and has sales and support offices all over the world. IAR Group AB is listed on NASDAQ OMX Stockholm, Mid Cap. Learn more at www.iar.com.

About ILITEK

ILITEK’s core technologies are Display and Touch. ILITEK becomes one of Taiwan TOP5 IC design house and TDDI market share achieve worldwide No.2 with its great products and strong service bases which are located in China, Korea, Europe and USA.

 

Media Contact:

Andes Technology

Jonah McLeod, Press Contact, Andes Technology

Tel: +1-510-449-8634 

E-mail: Jonahm@andestech.com

IAR

Rafael Taubinger, Sr. Product Marketing Manager, IAR

Mob: +46-18-16-78-00  E-mail: rafael.taubinger@iar.com

ILI Technology Corp.

Bert Chang, Product/Sales Manager, ILI Technology Corp.

Mobile: +886-911-425656  

E-mail: bert_chang@ilitek.com

Continue ReadingAndes and IAR Together Enable Leading Vendor ILITEK to Accelerate the Development of its ISO 26262 Ready TDDI SoC ILI6600A

Andes Technology: Stepping into the 18th Year with Perseverance and Proud Accomplishments

Hsinchu, Taiwan – February 9, 2023 – Since going public in 2017, Andes Technology has continued to gain market traction in CPU IP licensing, and its revenue has hit new highs for 6 consecutive years. Despite facing swift and tumultuous changes in the intellectual property industry and world economics, Andes attained significant growth, with a double-digit increase in their revenues in the year 2022. This financial success can be attributed to Andes’ strategy of providing customers with valuable solutions and cultivating the ever-expanding RISC-V ecosystem to make developing Andes-based solutions simpler and faster.

Andes has made remarkable strides in its intellectual property portfolio, and the cumulative number of IP license contracts has exceeded 450, establishing Andes as a leader in the industry. At the same time, its customer base is also expanding steadily, with notable companies like MediaTek, Renesas, Kneron, Picocom, MegaChips, Socionext and a few world leading enterprise groups among the list. In 2022, Andes’ customers deployed their solutions into a variety of applications such as AI, Datacenter, FPGA, IoT, MCU, Sensing, Server, Touch Panel, Video/TDD and Wireless.

Andes’ RISC-V product portfolio continued to grow in 2022, with the launch of several exciting offerings such as the N25F-SE, the industry’s first RISC-V core with ISO 26262 full compliance, and the AX45MPV, the industry’s most powerful multicore vector processor supporting 1024-bit vector computations. Andes also introduced the D23, an entry-level processor with low-power and advanced security features, and the AX60 series, an out-of-order superscalar multicore processor family with its first member, the AX65. In the software side, Andes released AndeSight™ IDE V5.1, a software development environment with new features designed to simplify the development of RISC-V heterogeneous multiprocessors and AI systems.

Determined to expand the RISC-V adoption globally, Andes maintains its key roles in RISC-V International including the board director, the technical steering committee, task group chairs, and the ambassador to participate in active technical and marketing subjects discussion. Employing more than 350 engineers at present, Andes continues to scale its talent recruitment with plans to expand its design centers in Taiwan and North America. To foster the long-term growth of RISC-V, Andes has also been promoting the open and innovative spirit of RISC-V to academia through initiatives such as the Andes Awards of the RISC-V Creative Competition for university students.

Due to its commercial success, Andes won numerous awards for its unique technologies and contributions to the industry. They include the 2022 WEAA and EE Awards Asia hosted by ASPENCORE Group, and the RISC-V Japan 2022 Product Award hosted by RISC-V International for promoting RISC-V to worldwide customers.

Despite the challenges posed by the global pandemic, Andes remained active in the industry by participating in over 50 important exhibitions and giving speeches around the world throughout 2022. Examples of the exhibitions included the AI Hardware Summit, Embedded World, Linley Processor Conference, RISC-V Summit, and the TSMC Technology Symposiums. The well-received speeches, webinars and events delved into the architecture and benefits of the diversified AndesCore™ processor IPs and the prevailing trends in RISC-V development and applications, including the latest RISC-V advancements in datacenter acceleration and automotive certification from Andes. The audience, ranging from RISC-V beginners, enthusiasts, to professionals gained insight into the latest industry developments.

“Andes’ extensive experience in product design and customer engineering greatly helps SoC design teams to release their products to the market faster,” said Frankwell Lin, the Chairman of Andes Technology and the board director of RISC-V International. “We remain committed to reshaping the computing industry by delivering the best-in-class RISC-V processors and the companion solutions. Building on 2022’s success, we look forward to bringing exciting new solutions to the market in 2023.”

About Andes Technology

Eighteen years in business and a Founding Premier member of RISC-V International, Andes is publicly-listed company (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099) and a leading supplier of high-performance/low-power 32/64-bit embedded processor IP solutions, and the driving force in taking RISC-V mainstream. Andes’ fifth-generation AndeStar™ architecture adopted the RISC-V as the base. Its V5 RISC-V CPU families range from tiny 32-bit cores to advanced 64-bit Out-of-Order processors with DSP, FPU, Vector, Linux, superscalar, and/or multi/many-core capabilities. The annual volume of Andes-Embedded SoCs has exceeded 3 billion in 2021 and continues to rise. By the end of 2022, the cumulative volume of Andes-Embedded™ SoCs has surpassed 12 billion. For more information, please visit https://www.andestech.com. Follow Andes on LinkedIn, Facebook, Weibo, Twitter, Bilibili  and YouTube! 

Continue ReadingAndes Technology: Stepping into the 18th Year with Perseverance and Proud Accomplishments

Andes Technology Collaborates with LDRA to Deliver Integrated Tool Suite for Safety-Critical Software on Andes RISC-V CPU Solutions

The integration helps developers to develop and manage applications in increasingly complex and safety-critical industries such as aerospace, automotive, railway, industrial, and medical on Andes RISC-V CPU solutions.

BANGALORE – January 19, 2023 – Andes Technology (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099), a leading supplier of high efficiency, low-power 32/64-bit RISC-V processor cores and founding premier member of RISC-V International, today announced the integration of AndeSight™ IDE with LDRA tool suite. The integration with LDRA’s comprehensive set of software standards compliance, testing, and verification tools helps developers to develop and manage applications in increasingly complex and safety-critical industries such as aerospace, automotive, railway, industrial, and medical on Andes RISC-V CPU solutions. This compliance results in safer, more secure, more efficient, and more capable software.

As part of the integration, the LDRA tool suite, along with the eclipse plugin, hooks into the AndeSight™ integrated development environment (IDE) to allow compilation, linking, programming, and execution in the AndeSight™ environments. The LDRA tool suite offers the built-in import capability to reduce the static analysis efforts of AndeSight™ project files via included paths, macros, and other settings. In addition, the LDRA tool suite performs dynamic analysis on simulator targets within the AndeSight™ IDE or on the AndeShape™ evaluation boards. This allows users to perform system and unit tests using the already available Andes infrastructure to provide a head start to developers.

The integration with the LDRA tool suite provides the following additional features to the AndeSight™ IDE:

  • Source code static analysis
  • Software dynamic analysis, including modified condition/decision coverage (MC/DC) on the host and target
  • Software unit/integration testing on the host and target
  • Improved code quality, safety, and security
  • Reduced testing time and cost

LDRA Tool Suite Meets TÜV Certification

Functional safety standards consider the increasing use of tools for software application development and explicitly require such tools to be qualified. TÜV SÜD examined the quality and compliance of the software development processes and functional safety management of the LDRA tools to the given standards. TÜV assessed the suitability of the LDRA tools and associated user documentation as capable of supporting developers in safety-critical industries to achieve certification.

AndesCore™ N25F-SE Processor, the World First RISC-V CPU IP with ISO 26262 Full Compliance

The AndesCore™ N25F-SE is a safety-enhanced 32-bit RISC-V CPU core and is certified to be fully compliant with ISO 26262 ASIL B (Automotive Safety Integrity Level B) functional safety standards, including Parts 2, 4, 5, 8, and 9, for the development of automotive applications. The N25F-SE inherits the compact and performant design of the popular N25F. It supports standard IMACFD extensions including efficient integer and floating-point instructions and incorporates the Andes V5 extension instructions to further boost performance and reduce code size. To fully utilize the capabilities of the AndesCore™, the AndeSight™ IDE provides a comprehensive software solution that helps optimize code speed and code size and simplifies the development process by providing application development, debugging, analysis, compute libraries, OS awareness, and multicore development to developers.

“AndesCore™ N25F-SE ASIL B certified processor brings unique and competitive value to our RISC-V customers,” said Warren Chen, Senior Technical Marketing Manager, Andes Technology.  “The exciting partnership with LDRA enables us to bring versatile solutions to the developers for safety-critical applications. We welcome the benefits the LDRA tool suite brings to the RISC-V community in accelerating the functional safety applications development.”

“Designers are currently moving toward real implementations of their RISC-V-based designs within multiple safety-critical industries,” said Ian Hennell, Operations Director, LDRA. “As the focus shifts to a software-driven architecture supported by top-notch analysis tools, the RISC-V software efforts require more than just enabling the existing architecture. With our integration with Andes Technology, developers can meet these requirements while making sure their software is safe and security-driven.”

About LDRA

For more than 45 years, LDRA has developed and driven the market for software that automates code analysis and software testing for safety-, mission-, security-, and business-critical markets. Working with clients to achieve early error identification and elimination, and full compliance with industry standards, LDRA traces requirements through static and dynamic analysis to unit testing and verification for a wide variety of hardware and software platforms. Boasting a worldwide presence, LDRA has headquarters in the United Kingdom, United States, Germany, and India coupled with an extensive distributor network. For more information on the LDRA tool suite, please visit www.ldra.com

About Andes Technology

Eighteen years in business and a Founding Premier member of RISC-V International, Andes is publicly-listed company (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099) and a leading supplier of high-performance/low-power 32/64-bit embedded processor IP solutions, and the driving force in taking RISC-V mainstream. Andes’ fifth-generation AndeStar™ architecture adopted the RISC-V as the base. Its V5 RISC-V CPU families range from tiny 32-bit cores to advanced 64-bit Out-of-Order processors with DSP, FPU, Vector, Linux, superscalar, and/or multi/many-core capabilities. The annual volume of Andes-Embedded SoCs has exceeded 3 billion in 2021 and continues to rise. By the end of 2022, the cumulative volume of Andes-Embedded™ SoCs has surpassed 12 billion. For more information, please visit https://www.andestech.com. Follow Andes on LinkedIn, Facebook, Weibo, Twitter, Bilibili  and YouTube! 

Media contacts:

Andes Technology

Jonah McLeod

Tel: +1 (510) 449-8634

Email: Jonahm@andestech.com

 

Hsiaoling Lin

Tel: +886-3-5726533 ext.644

Email: hllin@andestech.com

 

LDRA

Mark James

Tel: +44 (0) 151 649 9300

Email: mark.james@ldra.com  

 

HCI Marketing and Communications, Inc.

Kelly Wanlass

Tel: +1 (801) 602-4723

Email: kelly@hci-marketing.com

Continue ReadingAndes Technology Collaborates with LDRA to Deliver Integrated Tool Suite for Safety-Critical Software on Andes RISC-V CPU Solutions

Join Andes at RISC-V Summit; Learn the Only ISO 26262 Fully-Compliant RISC-V CPU, the Latest Multicore 4-Way Out-Of-Order Processor & the Multicore 1024-bit Vector Processor

Visit Andes’ Exhibition Hall Display in Booth D4 to View Live Demonstrations of its Leading-Edge CPU IP Technology

SAN JOSE, CA – December 7, 2022 – Andes Technology Corporation (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099), a leading supplier of high efficiency, low-power 32/64-bit RISC-V processor cores and Founding Premier member of RISC-V International announces its diamond sponsor participation in the RISC-V Summit, the premier annual event held from December 13 to 14, 2022 in San Jose McEnery Convention Center. The company will contribute three presentations and will also demonstrate its cutting-edge RISC-V CPU IP solutions at booth #D4. 

Andes President and CTO, Dr. Charlie Su, will present a wide range of RISC-V applications and introduce Andes’ new product lines which benefits the industry in the keynote speech “Expanding the RISC-V Horizon and Beyond” on December 14 at 10:00 AM. John Min, Director of Solution Engineering, Andes Technology USA, will introduce multiple new processors optimized for new application areas in his presentation “Future is Sideways – Not Only Up and Right” on December 13 at 4:45 PM. Furthermore, Hubert Chung, FAE Manager of Andes Technology, will give a talk on “Andes AI solutions: AndesClarity and NN/Vector Libraries” on December 14 at 1:00 PM at Demo Theater. 

In these informative speeches, the audience will get to learn the leading AndesCore™ RISC-V processor IP solutions. They include the recently announced N25F-SE, the industry’s first and only ISO 26262 fully-compliant RISC-V CPU; just announced AX65, a multicore 4-way out-of-order superscalar processor; the new AX45MPV, the leading-edge Linux multicore 1024-bit vector processor; and the new D23, the new-generation compact, versatile, secured core for IoT applications.

Andes will showcase the development boards with AndesCore ™embedded at our booth, including MPU development board from Renesas, AI development kit with camera module from Canaan, high-performance industrial-grade microcontrollers from HPMicro, Bluetooth development kit from Telink, IT9836 TDDI demo board from ITE and PC802SCB 5G small cell reference design from Picocom.

Besides presentations and live demo, Andes will join the RISC-V Member Day which kicks off the whole event on December 12. Andes CEO, Frankwell Lin, along with Andes President and CTO, Dr. Charlie Su will be interviewed during the Future Watch press conference and make a 25-minute talk about corporate updates and latest products. In addition, Andes is sponsoring the Onsite Attendee Reception in the main exhibition hall on December 13 at 5:10 PM. Join fellow attendees and enjoy refreshments at the end of the first RISC-V Summit day of presentations!

Please don’t forget to visit Andes booth #D4 and participate in the lucky draw to win an Andes Embedded Razor Gaming Headset! It’s a good opportunity for RISC-V enthusiasts to reserve one-on-one discussion with Andes experts to explore RISC-V solutions in further depth.

Details of Andes’ sessions during the RISC-V Summit are as follows:

 Monday, December 12,

•       11:00 – 11:25 AM: Future Watch (Press Conference)

Tuesday, December 13,

•       4:45 – 5:10 PM: Presentation “Future is Sideways – Not Only Up and Right” by John Min, Director of Solution Engineering

•       5:10 – 8:30 PM: Onsite Attendee Reception

Wednesday, December 14,

•       7:30 – 8:45 AM: RISC-V Influencers Breakfast

•       10:00 – 10:20 AM: Keynote “Expanding the RISC-V Horizon and Beyond” by Dr.Charlie Su, President and CTO

•       1:00 – 1:40 PM: Demo “AI Solution Including AndesClarity and NN/Vector Libraries” by Hubert Chung, FAE Manager

For more information, please visit the RISC-V Summit website.

About Andes Technology Corp.

Seventeen years in business and a Founding Premier member of RISC-V International, Andes is publicly listed company (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099) and a leading supplier of high-performance/low-power 32/64-bit embedded processor IP solutions, and the driving force in taking RISC-V mainstream. Andes’ fifth-generation AndeStar™ architecture adopted the RISC-V as the base. Its V5 RISC-V CPU families range from tiny 32-bit cores to advanced 64-bit cores with DSP, FPU, Vector, Linux, superscalar, and/or multicore capabilities. The annual volume of Andes-Embedded SoCs has exceeded 3 billion in 2021 and continues to rise. By the end of 2021, the cumulative volume of Andes-Embedded™ SoCs has surpassed 10 billion. For more information, please visit https://www.andestech.com. Follow Andes on LinkedIn, Twitter, Facebook, and YouTube! 

Continue ReadingJoin Andes at RISC-V Summit; Learn the Only ISO 26262 Fully-Compliant RISC-V CPU, the Latest Multicore 4-Way Out-Of-Order Processor & the Multicore 1024-bit Vector Processor

Andes Announces RISC-V Multicore 1024-bit Vector Processor: AX45MPV

Vector Processing is brought to the Award Winning AndesCore™ 45-Series

SAN JOSE, CA – December 7, 2022 – Andes Technology Corporation  (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099), a leading supplier of high efficiency, low-power 32/64-bit RISC-V processor cores and Founding Premier member of RISC-V International, today proudly announces the new member of popular AndesCore™ 45-Series, the AX45MPV with Linux multicore and 1024-bit vector processing capabilities. The AX45MPV targets the applications with large volumes of data such as datacenter AI inference and training, ADAS, AR/VR, computer vision, cryptography, and multimedia.

The AX45MPV inherits all the features of the AX45MP and leverages the 3-year field experience of the successful Andes vector processor NX27V. The AX45MP is a 64-bit 8-stage dual-issue multicore RISC-V processor. It incorporates RISC-V GCBP* extensions, and supports SMP Linux with MMU (Memory Management Unit) and up to 48-bit virtual addresses. In addition, it can be configured to up to eight cores with coherence manager and up to 8MB shared L2 cache memory in a cluster. The coherence manager ensures the data coherence of all L1 data caches and supports the optional IO coherence port. (*P is a draft version)

The Vector Processing Unit (VPU) of the AX45MPV implements RISC-V Vector Extension (RVV) version 1.0. It supports configurations of up to 1024-bit vector width (VLEN) and datapath width (DLEN). The VPU can dual-issue vector instructions to functional units, where instructions with all inputs ready can be executed simultaneously and can produce up to 6 x 1024-bit results every cycle. The data formats can be integer, fixed-point and floating point as well as Andes-extended data types optimized for AI representations. In addition, the vector load and store segment instructions can move multiple contiguous fields in memory to and from consecutive vector registers to allow efficient vector processing of video, audio/speech, complex numbers, and other data. Furthermore, the Andes Streaming Port (ASP), first available in the NX27V, is a dedicated command and data interface to move large amount of data between AX45MPV (scalar and vector) registers and an external accelerator. The command part of the RVV-aware ASP is user-defined with optional on-the-fly operations designed through the powerful Andes Custom Extension™ (ACE) framework.

“The AX45MPV multicore vector processor is another important milestone for Andes and RISC-V enthusiasts since our NX27V, the first RISC-V commercial vector processor and a very successful one announced 3 years ago,” said Andes Chairman and CEO, Frankwell Lin. “Some of our customers are looking for a Linux-capable multicore vector processor with faster data movement and computations. The versatile AX45MPV empowers our customers to fulfill their various demands for compute acceleration. It is exciting to see AX45MPV perfectly satisfy their expectations.”

“Multicore vector processors are designed for applications with high parallelism. The AX45MPV with outstanding scalar performance supports up to eight cores in one cluster with coherence manager and an optional L2 cache controller,” said Dr. Charlie Su, CTO and President of Andes. “Compared with the NX27V at its maximum VPU configuration, 512-bit VLEN and DLEN, the similarly-configured AX45MPV is expected to deliver 20%~40% higher performance for non-MAC dominated computation kernels while the AX45MPV with 1024-bit VLEN and DLEN can deliver 2x performance for MAC dominated kernels. The AX45MPV has being requested by customers whose applications need to process arrays of data with size over 1024 bits.”

The AX45MPV fully supports the AndeStar™ V5 architecture, which includes the latest RISC-V extensions and also Andes extended features such as PowerBrake and QuickNap™ for power saving; StackSafe™ for stack overflow/underflow protection; and CoDense™ for additional code density enhancement on top of RISC-V C-extension. Furthermore, the AX45MPV benefits from all existing Andes development tools for AX45MP and NX27V such as the AndeSight™ IDE and optimizing compilers, the Vector and Neural Network libraries, the intuitive AndesClarity™ pipeline visualizer and analyzer to help optimize performance-critical computation kernels, and Andes Custom Extension™ framework. It can also leverage the broader RISC-V ecosystem from security solutions to system level modeling, and hardware debug/trace subsystems.

About Andes Technology

Seventeen years in business and a Founding Premier member of RISC-V International, Andes (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099) is a leading supplier of high-performance/low-power 32/64-bit embedded processor IP solutions, and the driving force in taking RISC-V mainstream. Andes’ fifth generation AndeStar™ architecture adopted the RISC-V as the base. Its V5 RISC-V CPU families range from tiny 32-bit cores to advanced 64-bit cores with DSP, FPU, Vector, Linux, superscalar, and/or multicore capabilities. The annual volume of Andes-Embedded SoCs has exceeded 3 billion since 2021 and continues to rise. In the end of 2021, the cumulative volume of Andes-Embedded™ SoCs has surpassed 10 billion.

For more information, please visit https://www.andestech.com/en/homepage

Follow Andes on Twitter, LinkedIn, YouTube and Facebook.

Continue ReadingAndes Announces RISC-V Multicore 1024-bit Vector Processor: AX45MPV

Andes Technology Unveils the AndesCore™ D23, a Feature-Rich, Low-Power and Highly-Secured Entry-Level RISC-V Processor

D23 Delivers the Industry Leading 4.13 Coremark/MHz with the Latest RISC-V ISA

SAN JOSE, California – December 7, 2022 – Andes Technology Corporation (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099), a leading supplier of high efficiency, low-power 32/64-bit RISC-V processor cores and Founding Premier member of RISC-V International, today announces the details of the AndesCore™ D23, a new 3-stage 32-bit RISC-V CPU core, to target embedded processing and IoT applications that require low power and high efficiency in a small footprint. The D23 achieves the industrial leading performance of 4.13 Coremark/MHz among the similar level of cores, the worst-case operating frequency at 28nm of up to 800MHz, and the minimum usable configuration at 26K gates.

“The D23 is a new member of the Entry Series AndesCore™ with a small gate count and high performance-efficiency. In addition to RISC-V RV32GC extension including single/double precision FPU, it supports the recently ratified extensions such as bit manipulation (B) extension, scalar cryptography (K) extension, cache management operation (CMO) extension, code size reduction extension and the draft of packed SIMD/DSP extension. The packed SIMD extension together with Andes NN SDK, which includes TensorFlow Lite and Andes AI optimizer,  help customers to provide AI acceleration in a small package. It also deploys Core-Local Interrupt Controller (CLIC) which can service more than 1000 interrupts for fast interrupt response, interrupt prioritization and pre-emption, and Andes V5 extensions that includes StackSafe™ for hardware stack protection, CoDense™ for code size compression on top of the C extension, and PowerBrake for power management,” stated President and CTO, Dr. Charlie Su.  “Other advanced functions like instruction and data caches, memory soft error protection and Andes Custom Extension™ will be available too.”

Furthermore, the D23 packs many security features, such as enhanced and supervisor-mode Physical Memory Protection (ePMP/sPMP) to improve CPU core’s security level. The new scalar cryptography extension (K) provides instructions to accelerate AES encryption/decryption for network and data encryption and SHA256/512 instructions for digital signatures and certificates. The D23 also supports AndeSentry™, a security framework that enables open collaboration with our security partners to provide security solutions such as secure boot/debug and TEE. The D23 is perfect match for the new Matter IoT standard because its strong security features. The D23 gives designers the ability and flexibility to meet the demands for DSP processing, security, power, area and performance. Therefore, it can be used in many applications such as smart home appliances, wearables, AIoT devices and special purpose MCUs.

The D23 with most features will be available for early customer evaluation at Q1 2023, and its full features for general customer evaluation at Q3. Please contact Andes Sales for the details at sales@andestech.com.  

 

About Andes Technology

Seventeen years in business and a Founding Premier member of RISC-V International, Andes is publicly-listed company (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099) and a leading supplier of high-performance/low-power 32/64-bit embedded processor IP solutions, and the driving force in taking RISC-V mainstream. Andes’ fifth-generation AndeStar™ architecture adopted the RISC-V as the base. Its V5 RISC-V CPU families range from tiny 32-bit cores to advanced 64-bit cores with DSP, FPU, Vector, Linux, superscalar, and/or multicore capabilities. The annual volume of Andes-Embedded SoCs has exceeded 3 billion in 2021 and continues to rise. By the end of 2021, the cumulative volume of Andes-Embedded™ SoCs has surpassed 10 billion. For more information, please visit https://www.andestech.com. Follow Andes on LinkedIn, Twitter, Facebook, and YouTube!   

Continue ReadingAndes Technology Unveils the AndesCore™ D23, a Feature-Rich, Low-Power and Highly-Secured Entry-Level RISC-V Processor

Andes Technology and Parasoft Collaborate to Provide Seamless Software Testing Tools for Automotive Functional Safety Applications

SAN JOSE, CA – December 7, 2022 – Andes Technology, a leading supplier of high-performance, low-power 32/64-bit RISC-V processor cores and founding premier member of RISC-V International, and Parasoft, a global leader in automated software testing, jointly announced the establishment of the global partnership to provide the robust software testing solutions for Andes RISC-V automotive platform according to the rigorous ISO 26262 certification process.

Parasoft C/C++test integrates seamlessly with the AndeSight™ integrated development environment. With these combined tools, software developers gain the ability to configure fast and scalable CI/CD (Continuous Integration / Continuous Delivery) pipelines and automate the testing process. Parasoft provides a complete set of testing solutions for the automotive safety life cycle, shorten the stringent certification process for automotive products, and speed up the time to market for customers.

The safety-enhanced AndesCore™ N25F-SE is the first RISC-V CPU IP certified to be fully compliant with ISO 26262 functional safety standards, including Parts 2, 4, 5, 8 and 9, for the development of automotive applications. The N25F-SE is a 32-bit RISC-V CPU core that supports standard IMACFD extensions, including efficient integer instructions and single/double precision floating point instructions. It incorporates the Andes V5 extension instructions to further boost performance and reduce code size. The efficient 5-stage pipeline of the N25F-SE provides a good balance of high operating frequency and compact design. Like its sought-after cousin the N25F, the N25F-SE comes with rich configurable options, all of which are fully certified, and thus SoC design teams are not limited by one fixed CPU configuration when offering automotive solutions.

The joint collaboration ensures ISO 26262 standards by enabling containerized deployments of the AndeSight™ IDE with Parasoft C/C++test and help improve flexibility and productivity for developers. It reaps the benefits of running these pre-packaged containers when performing static analysis and unit testing.

About Parasoft

Parasoft helps organizations continuously deliver quality software with its market-proven, integrated suite of automated software testing tools. Supporting the embedded, enterprise, and IoT markets, Parasoft’s technologies reduce the time, effort, and cost of delivering secure, reliable, and compliant software by integrating everything from deep code analysis and unit testing to web UI and API testing, plus service virtualization and complete code coverage, into the delivery pipeline. Bringing all this together, Parasoft’s award winning reporting and analytics dashboard delivers a centralized view of quality enabling organizations to deliver with confidence and succeed in today’s most strategic ecosystems and development initiatives — cybersecure, safety-critical, agile, DevOps, and continuous testing.

About Andes Technology

Seventeen years in business and a Founding Premier member of RISC-V International, Andes (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099) is a leading supplier of high-performance/low-power 32/64-bit embedded processor IP solutions, and the driving force in taking RISC-V mainstream. Andes’ fifth generation AndeStar™ architecture adopted the RISC-V as the base. Its V5 RISC-V CPU families range from tiny 32-bit cores to advanced 64-bit cores with DSP, FPU, Vector, Linux, superscalar, and/or multicore capabilities. The annual volume of Andes-Embedded SoCs has exceeded 3 billion since 2021 and continues to rise. In the end of 2021, the cumulative volume of Andes-Embedded™ SoCs has surpassed 10 billion.

For more information, please visit https://www.andestech.com/en/homepage

Follow Andes on Twitter, LinkedIn, YouTube and Facebook. 

Continue ReadingAndes Technology and Parasoft Collaborate to Provide Seamless Software Testing Tools for Automotive Functional Safety Applications