In just a few years, AndesCore™ IP solutions from Andes Technology Corporation have become one of the market leaders with volumes over the 1B unit mark. This amazing results stems from two key philosophies that Andes has embraced. The first of these is what we call performance-efficiency: achieving desired performance results while keeping SOC-level power to an absolute minimum. Andes' customers will find that all of AndesCore CPUs and peripherals contain novel ways to keep power demands at a minimum; at whatever performance numbers are required.

The second of these is a dedication to listening to our customers and partners – and delivering the quality products that they demand. Each new Andes product is created as a result of blending our ideas for innovation along with feedback on actual customer usability. For example, we deliver significant amounts of product flexibility to our customers, through highly configurable RTL and supporting software. To meet their quality needs, these are delivered with full documentation – but also with realization that IP verification is key. Our significant customer experience stems in part from the location of our headquarters - in Taiwan's Hsinchu Science Park. Here we are able to interact with numerous customers, manufacturing partners and other members of the semiconductor industry that either frequent the area or have offices here. If your business brings you to Taiwan, we welcome your visit to Andes Technology Corporation Headquarters.

All AndesCore CPU products are based on our patented AndeStar™ Instruction Set Architecture (ISA). This is a RISC-like architecture developed exclusively by Andes Technology Corporation specifically to enable more performance-efficiency and power savings. AndeStar™ is the next-generation of RISC computing, with power and performance features contained in no other ISA.

AndesCore products range from ultra-small “MCU-type” cores, often used when upgrading from 8051, all the way to high-end, MMU-enabled multicores, which can run at speeds of > 1 GHz without use of expensive libraries or high-power manufacturing choices. We enhance our cores with optional floating point and DSP capabilities as well as power savings techniques such as PowerBrake™ and FlashFetch™. Our AndeSight™ software toolchain is based on the industry-standard GCC compiler with Eclipse-based debuggers and is absolutely best-in-class. Our quality control is second to none and we have over 100 CPU licensee customers and more than 10,000 individuals developing applications with our tools.

Even our AndeShape™ SOC peripherals are designed to deliver low power through performance-efficiency and to be simple and reliable to use.

This attention to performance-efficiency and product quality has helped Andes expand into a number of exciting markets such as: Internet-of-Things (IoT), Wearable Computing, Networking, 8-bit replacement and more.