President Lin to speak at 2017 VLSI Design/CAD Symposium


Frankwell Jyh-Ming Lin was invited to give a speech titled“From 32 to 64: Intelligently Connect the Grand Future of AI”at 2017 VLSI Design/CAD Symposium. Andes becomes the first mainstream CPU IP provider to adopt RISC-V. AndeStar™ V5 supports 64-bits and the widely known RISC-V ISA as its subset and will bring the open, compact, and modular RISC-V into mainstream SoC applications.

Date: August 2, 2017
Time: 13:30-14:30
Venue: Howard Beach Resort, Kenting, Taiwan

Event Website (Chinese)