晶心科技隆重推出高性能 AndesCore™ RISC-V 多核心向量處理器 AX45MPV

【台灣新竹】– 2023年10月18日 – 32/64位元、高效能低功耗的RISC-V處理器核心領導供應商暨RISC-V國際協會創始首席會員晶心科技(TWSE: 6533),今日欣然地宣佈AndesCore™ 旗下高性能多核心向量處理器IP的AX45MPV正式上市。AX45MPV是已獲得多個獎項之AndesCore™向量處理器系列的第三代產品。它配備了強大的RISC-V「向量處理」和「並存執行」能力,可以用在具有處理大量資料需求的應用領域,例如自動駕駛、人工智慧推理與訓練、AR(擴增實境)/VR(虛擬實境)、影像處理、機器人和信號處理。

晶心科技和Meta (原Facebook)公司自2019年初,即展開在AI資料中心領域展開合作(詳見附註*),並採用了晶心科技第一代的RISC-V向量核心IP。之後,晶心科技在2019年底發佈了AndesCore™ NX27V,這是業界首個商用RISC-V向量處理器核心,也是RISC-V的重要里程碑,NX27V每個週期最多可以產生4個512位元向量結果(VLEN results)。立即引起了全球各地的人工智慧晶片設計團隊的關注,已經在十多個AI資料中心項目中獲得採用並取得成功。從那時起,RISC-V向量處理器核心已成為機器學習和人工智慧晶片開發供應商的首選。

為了進一步提高計算密度,AX45MPV擴展了AX45MP的雙發射8級流水線、多核心能力並支援Linux,同時從其前一代NX27V承襲了並強化了向量處理單元。AX45MPV的原始設計就是一個具備AI資料中心級的Linux應用處理器,但客戶也可以選擇關閉它支援Linux和多核心的功能,將它作為一個高效且強大的計算處理器,適合使用於大型計算陣列中的處理單元(PEs)。

AX45MPV具備雙發射能力,每個週期可產生高達6個1024位元向量結果,比其前一代NX27V,性能提高了3倍以上。為了充分發揮其更高的計算能力,AX45MPV提供了兩個1024位元的高速記憶體介面。全新的高速向量局部記憶體(HVM)提供1或2個通道的內存支援,非常適合向量的運算。並且可以配合外部DMA引擎,在AX45MPV做向量計算的同時,通過AXI訪問埠在後臺傳輸資料。另外,Andes提供了晶心串流通訊埠(ASP),自晶心第一個向量處理器起,就支援的晶心串流通訊埠(ASP)是需要同時支援輔助處理器控制和資料傳輸的需求最佳解決方案。AX45MPV通過結合ASP和HVM埠,可以有效地將其記憶體頻寬加倍,每個週期能夠載入2個向量資料。AX45MPV還支持最新的晶心客製化擴充指令(ACE),可協助客戶創建自己的RISC-V向量指令。例如,ACE可以用於加速諸如Transformer AI上的非線性數學函數(如SoftMax)等任務。

「自2019年以來,晶心科技一直為AI資料中心客戶提供RISC-V向量架構產品及服務,並積累了豐富的經驗。」晶心科技總經理暨CTO蘇泓萌博士(Dr. Charlie Su)表示:「晶心第三代向量處理器AX45MPV配備了強大的1024位元向量單元、高效的多核心並支援Linux及多功能配置,是專門為大型語言模型(LLMs)量身定制的IP。隨著2023年生成式AI應用的激增,我們可以看到AX45MPV在超越雲端(beyond the cloud),在人工智慧和機器學習領域扮演重要角色。」

已有亞洲和北美的客戶取得AX45MPV的授權,全球多個客戶亦正在評估中。客戶的應用從雲端到邊緣,涵蓋多個領域。支援嵌入式作業系統的AX45MPV標準產品已經正式推出。提供支援Linux的進階產品,將於2023年第四季上市。

關於晶心科技
晶心科技股份有限公司於2005年成立於新竹科學園區,2017年於臺灣證交所上市 (TWSE: 6533 SIN: US03420C2089ISIN: US03420C1099)。晶心是RISC-V國際協會的創始首席會員,也是第一家推出商用RISC-V向量處理器的主流CPU供應商。為滿足當今電子設備的嚴格要求,晶心提供可配置性高的32/64位高效能CPU核心,包含DSP、FPU、Vector、超純量 (Superscalar)、亂序執行 (Out-of-Order)及多核心系列,可應用於各式SoC與應用場景。晶心並提供功能齊全的整合開發環境和全面的軟/硬體解決方案,可説明客戶在短時間內創新其SoC設計。截至2022年底,嵌入AndesCore™ 的SoC累積總出貨量已達120億顆。更多關於晶心的資訊,請參閱晶心官網https://www.andestech.com。追蹤晶心最新消息:LinkedInFacebookTwitterBilibili以及YouTube

*MTIA: First Generation Silicon Targeting Meta’s Recommendation Systems, ISCA ’23: Proceedings of the 50th Annual International Symposium on Computer Architecture, June 2023

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Andes Technology Unveils Andes D23 and N225 Cores Pioneering the Next Generation of Compact, Performant, and Secure RISC-V Processor Technology

Hsinchu, Taiwan – Oct. 17, 2023 – Andes Technology, the renowned supplier of high-efficiency, low-power 32/64-bit RISC-V processor cores and a Founding Premier member of RISC-V International, proudly announces the release of its latest innovation – the AndesCore™ D23 and N225 RISC-V processors. Specifically designed to cater to the dynamic needs of the Internet of Things (IoT) and embedded systems, these cores epitomize Andes’ unwavering commitment to delivering cutting-edge technology for the interconnected world.

The D23 and N225 cores have been meticulously engineered with compactness, performance-efficiency, low-power consumption, flexibility, and security as top priorities. These cores empower IoT and embedded chip and device manufacturers to meet the burgeoning demands of a rapidly evolving market while minimizing power usage and ensuring robust security.

Andes announced the popular N22, a 2-stage pipeline AndesCore implementing RV32I/EMAC ISA back in February 2019, targeting deeply embedded processing and having a performance of 3.95 Coremark/MHz and 1.8 DMIPS/MHz. The D23 and N225 are revamped designs with a new microarchitecture and the latest RISC-V extensions (details below) to offer better performance, smaller code size, and more security support. They provide a good migration path for customers looking to upgrade their N22 designs or kick-off a new design today.

Common Key Features of AndesCore D23 and N225:
Latest RISC-V Extensions Support:
The N225 implements the RV32 IMACBZce non-privileged extensions as well as Machine/User modes and Enhanced Physical Memory Protection (ePMP). The D23 additionally supports the FDKP extensions (Single/Double-Precision Floating-Point, Scalar Crypto and Packed SIMD/DSP draft), and CMO (Cache Management Operations) extension. The D23 is also incorporated with Supervisor mode and its associated PMP (sPMP) for higher security.

Compact Size: Both cores feature a highly compact design with a 3-stage pipeline, primarily supporting single instruction issue with some dual-issue capability. This makes them exceptionally well-suited for space- and memory-constrained IoT and embedded applications, including wearables, sensors, and smart home devices.

High Performance: Both cores achieve industry-leading performance in their class, boasting outstanding benchmark scores such as 4.55 (D23) and 4.4 (N225) Coremark/MHz, and 2.08 (D23) and 1.92 (N225) DMIPS/MHz, respectively. They are capable of operating at high frequencies across various technology nodes such as near 800 MHz at 28nm, providing the necessary computing power for edge IoT devices with ever-increasing performance and feature demands.

Power Management: Both cores support advanced power management technologies such as PowerBrake and Wait-For-Interrupt (WFI) and Wait-For-Event (WFE), ensuring prolonged battery life for many types of untethered IoT devices.

Small Code Size: The N22 already offers industry-leading code size with Andes CoDense™ technology. With the addition of the new RISC-V Zce code size reduction extension, the D23 and N225 further reduce 4.4% code size for the Embench-IoT benchmark, compared to the N22. This provides additional memory cost-saving for Andes customers.

Flexibility: Both cores offer extensive configurability, including optimized multipliers for performance or area, optional static or dynamic branch prediction, various combinations of privilege modes, instruction and data Local Memories with sizes from 1 KB to 512 MB, and 2-wire or 4-wire JTAG debug interface. Designers can tailor these features to address their specific application requirements.

Ease of SoC Integration: To simplify integration into System-on-Chip (SoC) designs, both cores support either Core-Local Interrupt Controller (CLIC) for the single-CPU SoC or Platform-level Interrupt Controller (PLIC) for multiple-CPU SoC, rich options for AMBA interfaces, private machine timers or platform machine timers, and instruction trace interfaces.

In addition to the above-mentioned shared features and latest RISC-V extensions, the D23 core boasts additional capabilities, including built-in instruction and data caches, and ECC soft error protection for all cache and local memories. It can also seamlessly integrate with the powerful ACE™ (Andes Custom Extension) to support custom instructions for Domain-Specific Acceleration (DSA) and has a roadmap to include a functional safety derivative. These expanded capabilities open up opportunities for the D23 to serve a wider range of segments in automotive and industrial control applications.

Dr. Charlie Su, President and CTO of Andes Technology, expressed his enthusiasm for the release of these cores, stating, “The D23 and N225 mark a significant milestone in our commitment to providing innovative solutions for the IoT and embedded segments. With their compact design, power efficiency, and robust security features, these cores are poised to set new industry standards. We believe they will empower designers and developers to create cutting-edge products that can thrive in the fast-paced world of IoT.”

The D23/N225 have been licensed out and several companies are actively evaluating them. Their overall features will be developed and delivered in two phases. For more information about these cores, please visit the Andes Technology website.


About Andes Technology
Eighteen years in business and a Founding Premier member of RISC-V International, Andes is a publicly-listed company (TWSE: 6533SIN: US03420C2089ISIN: US03420C1099) and a leading supplier of high-performance/low-power 32/64-bit embedded processor IP solutions, and the driving force in taking RISC-V mainstream. Its V5 RISC-V CPU families range from tiny 32-bit cores to advanced 64-bit Out-of-Order processors with DSP, FPU, Vector, Linux, superscalar, and/or multi/many-core capabilities. By the end of 2022, the cumulative volume of Andes-Embedded™ SoCs has surpassed 12 billion. For more information, please visit https://www.andestech.com. Follow Andes on LinkedInTwitterBilibili and YouTube! ! 

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