晶心新聞

Learn the Latest on RISC-V and Vector Processing at All Five Andes Technology’s Presentations at the 2021 RISC-V Summit

Visit Andes’ Exhibition Hall Display to View Live Demonstrations of its Leading-Edge CPU IP Technology

Hsinchu, Taiwan – November 30, 2021 – Andes Technology Corporation (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099), a leading supplier of high efficiency, low-power 32/64-bit RISC-V processor cores and Founding Premier member of RISC-V International will contribute five presentations at the RISC-V Summit from December 6 to 8, 2021. The company will also demonstrate its latest RISC-V IP in a prominent booth in the RISC-V Summit Exhibition Hall.  

Andes President and CTO, Dr. Charlie Su, will deliver the keynote speech “Beefing Up the Datacenter Accelerators” on December 7 at 1:45 PM. On December 8 at 4:00 PM, Dr. Paul Ku, Deputy Technical Director of Architecture Div., will provide IOPMP updates in his presentation “The Protection of IOPMP.”

According to the ResearchAndMarkets report released in September this year, the global market for data center accelerators should grow from $13.5 billion in 2021 to $66.4 billion by 2026, at a compound annual growth rate (CAGR) of 37.6 percent for the period of 2021-2026. Design teams are being challenged to come out a scalable architecture with a limited power budget in a short time window. To address this, Dr. Su will identify the best-in-class, off-the-shelf processor IP for the task. His Keynote will explain how Andes’ RISC-V solutions help designers customize their designs to meet the high-performance goals, tightly couple them with hardwired engines, and integrate the customized processor compilers with their AI model compilers.

Additionally, Toolchain Group Manager, Dr. I-Wei Wu, will introduce “Performance of TVM AutoScheduler for Andes Vector Processor.” Chun-Wei Shu, Software Engineer, will discuss “Bring Multicore RISC-V and Zephyr RTOS Together.” In addition, Academia Sinica in collaboration with National Tsing Hua University, Taiwan and Andes will present “Sail Specification for RISC-V P-Extension.”

For more information, please visit the RISC-V Summit website.

About Andes Technology Corp.
Sixteen years in business and a Founding Premier member of RISC-V International, Andes is a leading supplier of high-performance/low-power 32/64-bit embedded processor IP solutions, and a main force to take RISC-V mainstream. Andes’ fifth-generation AndeStar™ architecture adopted the RISC-V as the base. Its V5 RISC-V CPU families range from tiny 32-bit cores to advanced 64-bit cores with DSP, FPU, Vector, Linux, superscalar, and/or multicore capabilities. The annual volume of Andes-Embedded SoCs has exceeded 2 billion since 2020 and continues to rise. To the end of Q3 2021, the cumulative volume of Andes-Embedded™ SoCs has reached 9 billion. For more information, please visit https://www.andestech.com. Follow Andes on LinkedIn, Twitter, Facebook, and YouTube!

Continue ReadingLearn the Latest on RISC-V and Vector Processing at All Five Andes Technology’s Presentations at the 2021 RISC-V Summit

上海先楫半導體發布微控制器HPM6000系列 採用晶心AndesCore™ 雙D45核心 強大算力加速智慧工業、智慧家電、邊緣運算及物聯網等應用

目前全球性能最強的即時RISC-V微控制器HPM6000系列，主頻高達 800MHz，創下超過9000 CoreMark™ 和4500 DMIPS性能的新記錄

【台灣新竹】 2021年11月24日，高性能嵌入式解決方案領導廠商上海先楫半導體(HPMicro Semiconductor Co., LTD.)與32/64位元RISC-V嵌入式處理器核心領導供應商晶心科技(Andes Technology, TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099)，今日共同發布目前全球性能最強的即時RISC-V微控制器HPM6000系列。該系列旗艦產品HPM6750採用雙Andes D45 RISC-V核心，配置創新匯流排架構、高效的L1 cache和local memory，創下超過9000 CoreMark™和4500 DMIPS性能的新記錄，主頻高達 800MHz，為邊緣運算等應用提供強大的算力。

HPM6000 MCU全系列產品，包括多核心的HPM6750、單核心的HPM6450，及入門級的HPM6120版本，都具有雙精度浮點運算及強大的DSP擴充指令，內置2MB SRAM，以及豐富的多媒體功能、馬達控制模組、通訊介面及安全加密。HPM6000系列具備高效能、低功耗、高安全的特點，可廣泛應用於智慧工業、智慧家電、金融終端支付系統、邊緣運算及物聯網等熱門應用。

AndesCore™  D45是晶心科技RISC-V家族45系列成員之一，採用循序執行的8級雙發射超純量技術，具有最佳化的存儲流水線設計以及進階分支預測功能，同時支援符合IEEE754的單/雙精度浮點運算單元(FPU)及RISC-V P擴充指令 (DSP/SIMD)。45系列核心也具有區域記憶體(local memory)支援的儲存子系統，以及可配置的指令及資料快取記憶體，對支援大量記憶體的SoC例如HPM6000系列，可進一步提升其軟體效能。D45核心非常適合用於對回應時間和即時準確性有特別要求的嵌入式應用產品。

「上海先楫的HPM6000系列產品具備高速算力和即時控制功能，將提供全球高階MCU市場更靈活及高效的選擇。」晶心科總經理暨技術長蘇泓萌博士表示：「藉由晶心科技的D45並配合支援AndeStar™ V5之Segger Embedded Studio®開發工具，客戶得以設計出更高效能、且程式碼更精簡的軟體。上海先楫領先同業，推出內嵌高效能RISC-V核心之MCU安全解決方案，展示團隊的超高的效率及卓越的研發能力。」

「Andes D45是唯一達到先楫半導體超高速即時運算要求的RISC-V處理器核心，在某些測試環境下，性能甚至超過其他競爭者50%！而晶心在產品導入的即時技術支援，協助我們成功並快速地完成HPM6000系列的Tape out，雙方團隊完美地進行了一次緊密高效的合作。」先楫半導體執行長曾勁濤表示：「先楫半導體為開發者提供完備的生態系統，包括一個基於VS CODE框架的免費整合式開發環境HPM Studio，以及PC端圖形介面的SoC資源配置工具。先楫半導體還將推出基於BSD許可的SDK，其中包含底層驅動程式，仲介軟體和RTOS。所有官方軟體產品都將開源，並配以高性價比的評估報告，先楫半導體將會與RISC-V社群的夥伴合作，為打造更好的RISC-V軟體生態作出貢獻。」

訂購/樣片資訊
HPM6750，HPM6450系列產品將於2021年12月底開始提供樣片和評估板，如需訂購可郵件至 info@hpmicro.com，更多資訊敬請訪問www.hpmicro.com

關於先楫半導體 (HPMicro Semiconductor)
先楫半導體是一家致力於高性能嵌入式解決方案的半導體公司，成立於2020年6月，總部坐落在上海張江，在天津和武漢設有子公司。先楫半導體的產品覆蓋微控制器、微處理器和周邊晶片，以及配套的開發工具和生態系統，先楫半導體具備成熟的研團隊，各研發關鍵職能(構架，類比，SOC，數位，IP，DFT，後端等)均由資深工程師負責。公司現有研發隊伍絕大部分擁有碩士以上學歷，包括博士數名。

2021年 10月，先楫半導體成功完成近億元PRE-A輪融資，由中芯聚源領投，東方電子關聯基金和創徒投資跟投。

先楫半導體將與世界知名晶圓廠、封裝測試廠及其它戰略合作夥伴一起，共同推進互聯網，工業自動化，消費電子等半導體領域的技術創新。更多關於先楫半導體的資訊，請訪問www.hpmicro.com。

關於晶心科技 (Andes Technology)
晶心科技股份有限公司於2005年成立於新竹科學園區，2017年於台灣證交所上市(TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099)。晶心是RISC-V國際協會的創始首席會員，也是第一家採用RISC-V作為其第五代架構AndeStar™基礎的主流CPU供應商。為滿足當今電子設備的苛刻要求，晶心提供可配置性高的32/64位高效CPU核心，包含DSP，FPU，Vector，超純量(Superscalar)及多核心系列，可應用於各式SoC與應用場景。晶心並提供功能齊全的整合開發環境和全面的軟/硬體解決方案，可幫助客戶在短時間內創新其SoC設計。在2020年，Andes-Embedded™ SoC的年出貨量突破20億顆；而截至2021年第三季，嵌入AndesCore™ 的SoC累積總出貨量已達90億顆。
更多關於晶心的資訊，請參閱晶心官網https://www.andestech.com。追蹤晶心最新消息：LinkedIn、Facebook、Weibo、Twitter、Bilibili以及YouTube。

Continue Reading上海先楫半導體發布微控制器HPM6000系列 採用晶心AndesCore™ 雙D45核心 強大算力加速智慧工業、智慧家電、邊緣運算及物聯網等應用

耐能智慧邊緣運算晶片KL530進入量產 晶心RISC-V D25F處理器協助提升算力
共同實踐「AI 無處不在」之願景

【美國加州聖地亞哥】 2021年11月4日，邊緣運算(Edge AI)解決方案領導廠商耐能智慧(Kneron)與32/64位元RISC-V嵌入式處理器核心領導供應商晶心科技(TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099)，今日共同宣布耐能智慧下世代AI智慧邊緣運算晶片KL530已正式量產。KL530採用晶心的D25F處理器，它包含高效的流水線、強大的Packed-SIMD DSP 擴充指令及符合 IEEE754 的高性能單/雙精度浮點RVFD擴充指令集。

KL530是耐能智慧的最新型異構AI晶片，採用全新的NPU架構，它是業界中第一個支持INT4精度和Transformer運算的產品。相比其它晶片，KL530具有更高的運算效率及更低功耗。這款AI 晶片內嵌RISC-V CPU並具備強大的影像處理能力和豐富的介面，能進一步促進邊緣智慧晶片在ADAS、AIoT等方面的應用。KL530算力達1 TOPS INT 4，在同等硬體配置下INT 8的處理效率提升高達70%，其可重構NPU設計搭配RISC-V D25F核心的高效能運算，可支持CNN、Transformer、RNN Hybrid等多種AI模型，還有智慧ISP可基於AI優化圖像品質、強力Codec實現高效率多媒體壓縮，並且冷開機時間低於500ms，平均功耗低於500mW。

D25F CPU 是 AndesCore™ 25 系列中被廣泛使用的核心之一，它支援 RISC-V P擴充指令集標準草案(RISC-V P-extension ISA draft)，可在一條指令中高效地同時處理多筆資料。晶心是P擴充指令集的原始架構者，並在RISC-V 國際協會之任務組主導其規格制訂。D25F 提供完整的開發工具，包括根據向量資料格式自動生成 SIMD 指令的編譯器、優化的DSP函式庫、神經網絡函式庫和近精確週期模擬器。D25F在常用的機器學習演算法上能提供近9倍的加速，包括 Tensorflow 關鍵字識別、CIFAR10 圖形分類和 P-net 物件偵測等。

「耐能擁有獨特的可重組式架構，可以輕鬆融入不同的卷積神經網絡(CNN)而不需對設計需求妥協，從而無縫、精確地應用於各種 AI 模型。」耐能智慧創始人兼執行長劉峻誠表示。「晶心D25F CPU 核心和其強大的 DSP 指令及其軟體開發框架使耐能可以在不犧牲最佳功耗表現的條件下，最大限度地探索其領先同行之AI算法性能。這對我們的客戶至關緊要。我們很高興能與專注RISC-V領域並取得領先地位之計算專家晶心科技合作。憑藉晶心RISC-V核心和DSP解決方案，耐能能夠在很短的時間內，順利開發出這款尖端解決方案，我們非常自豪現在 KL530 已投入量產並開始服務我們的客戶。」

「我們很高興耐能智慧在經過一系列綜合評估後，選擇 D25F為KL530之CPU核心，」晶心科執行長暨RISC-V國際協會董事林志明表示：「D25F在產品特點、效能、核心面積、功耗等各項關鍵指標都表現優異。耐能領先同業，提供內嵌RISC-V核心之邊緣AI SoC解決方案，並快速推出KL530進入量產，展示了團隊的超高的效率。耐能的強大競爭力令人震驚。感謝耐能與晶心的密切合作，我們共同完成了極具競爭力的解決方案，並將加速人工智慧應用進入各式產品中。」

關於Kneron KL530 線上發表會

Kneron KL530線上產品發表會將於美西時間11月4日上午10:00-11:30 (PDT)舉行，包含全球半導體聯盟(GAS) CEO Jodi Shelton、華邦科技陳沛銘總經理、YouTube創辦人陳士駿等人均受邀演講，發表他們對於下一代邊緣運算Edge AI的看法，報名資訊 https://www.kneron.com/en/event-registration/ab29527e

關於耐能智慧（Kneron）

耐能智慧（Kneron）於 2015 年創立於美國聖地牙哥，為終端人工智慧解決方案的領導廠商，提供軟硬體整合的解決方案，包括終端裝置專用的神經網路處理器以及各種影像辨識軟體。耐能智慧將人工智慧技術深入擴展到終端設備、硬體AI晶片與軟體AI模型等，滿足大從自動駕駛、智能冰箱，小至門鈴或各式AIoT產品的需求。Kneron所提供的智能設備具備安全性、超低功耗與低成本三大優勢，致力實現「AI無處不在」的願景。Kneron 目前在聖地牙哥、台北、深圳、珠海已成立辦公室，並擁有全球客戶和合作夥伴。

Kneron 於 2017 年 11 月完成 A 輪融資，投資者包含阿里巴巴創業者基金（Alibaba Entrepreneurs Fund）、中華開發資本國際（CDIB）、奇景光電（Himax Technologies, Inc.）、高通（Qualcomm）、中科創達（Thundersoft）、紅杉資本（Sequoia Capital）的子基金Cloudatlas以及創業邦。2018 年 5 月與 2020 年 1 月，耐能分別完成由李嘉誠旗下的維港投資（Horizons Ventures）領投的 A1 輪與 A2 輪融資。截至目前為止，Kneron 獲得的融資金額累計已超過一億美元。更多關於耐能智慧的資訊，請參閱 https://www.kneron.com/en/

關於晶心科技 (Andes Technology)
晶心科技股份有限公司於2005年成立於新竹科學園區，2017年於台灣證交所上市(TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099)。晶心是RISC-V國際協會的創始首席會員，也是第一家採用RISC-V作為其第五代架構AndeStar™基礎的主流CPU供應商。為了滿足當今電子設備的苛刻要求，晶心提供了可配置性高的32/64位高效CPU核心，包含DSP，FPU，Vector，超純量(Superscalar)及多核心系列，可應用於各式SoC與應用場景。晶心並提供功能齊全的整合開發環境和全面的軟/硬體解決方案，可幫助客戶在短時間內創新其SoC設計。在2020年，Andes-Embedded™ SoC的年出貨量突破20億顆，而截至2020年底，嵌入AndesCore™的SoC累積總出貨量已超過70億顆。
更多關於晶心的資訊，請參閱晶心官網https://www.andestech.com。追蹤晶心最新消息：LinkedIn、Facebook、Weibo、Twitter、Bilibili以及YouTube。

Continue Reading耐能智慧邊緣運算晶片KL530進入量產 晶心RISC-V D25F處理器協助提升算力
共同實踐「AI 無處不在」之願景

AndesBoardFarm提供SoC工程師透過遠端線上FPGA開發板探索RISC-V處理器

【台灣新竹】─2021年10月21日─32及64位元高效能、低功耗RISC-V處理器核心領導供應商、RISC-V國際協會(RISC-V International)創始首席會員晶心科技(TWSE: 6533)，於今日宣布推出「AndesBoardFarm」，一個可以提供 SoC 設計人員從自己的電腦遠端取得晶心FPGA 開發板及管理軟體的系列工具，讓他們能立即體驗開發AndesCore® RISC-V處理器。藉由使用晶心所提供的全面整合開發環境AndeSight™，設計人員可以透過網路以晶心最新的CPU核心運行他們的軟體，進行性能測試並直接獲得結果；同時，還可以探索晶心所提供的各種軟硬體的功能。工程師善用AndesBoardFarm的服務，將大幅減少評估RISC-V處理器的時間和精力，為他們的SoC選擇最佳的RISC-V CPU核心。

「創建一個具備複雜功能的多核心RISC-V SoC，並同時開發應用程式來完全利用硬體功能是一項高挑戰的任務，」晶心科技總經理暨技術長蘇泓萌博士說。「面對日趨複雜的設計和需求快速變化所帶來的挑戰，要做出決定並確保對其開發項目最有利的 IP 極需遠見。為了協助SoC設計團隊能從其自身的角度及需求，找到最適合的AndesCore™，晶心科技建立了一系列FPGA開發板，將之連接到具備網路安全保護的伺服器群，並同時運行安全管理軟體。客戶可以申請帳號並將他們的設計及程式上傳到AndesBoardFarm網站的開發板上，節省精力並確認他們的設計需求。」

AndesBoardFarm FPGA開發板系列包含所有的晶心RISC-V處理器解決方案，做為嵌入式 SoC 設計的參考，包括32位元及64位元單核或多核的處理器，以及其他功能選項，例如用於 Linux作業系統的MMU、用於多媒體處理的SIMD指令以及用於AI與其他需要大量數據和複雜計算的向量擴充指令集。如果需要更多詳細資訊，請聯繫sales@andestech.com。

AndesBoardFarm

關於晶心科技(Andes Technology)
晶心科技股份有限公司於2005年成立於新竹科學園區，2017年於台灣證交所上市(TWSE: 6533)。晶心是RISC-V國際協會的創始首席會員，也是第一家採用RISC-V作為其第五代架構AndeStar™基礎的主流CPU供應商。為了滿足當今電子設備的苛刻要求，晶心提供了可配置性高的32/64位高效CPU核心，包含DSP、FPU、Vector、超純量(Superscalar)及多核心系列，可應用於各式SoC與應用場景。晶心並提供功能齊全的整合開發環境和全面的軟/硬體解決方案，可協助客戶在短時間內創新其SoC設計。在2020年，Andes-Embedded™ SoC的年出貨量突破20億顆，而截至2020年底，嵌入AndesCore™的SoC累積出貨量已超過70億顆。更多關於晶心的資訊，請參閱晶心官網https://www.andestech.com。追蹤晶心最新消息：LinkedIn、Facebook、Weibo、Twitter、Bilibili以及YouTube!

關於晶心RISC-V AndesCore™系列
晶心科技全面的RISC-V CPU系列涵蓋了入門級32位元N22、中階32位元N25F/D25F/A25/A27和64位元NX25F/AX25/AX27以及高階多核A(X)25MP和向量處理器NX27V，以及近期推出的最新超純量45系列。

Continue ReadingAndesBoardFarm提供SoC工程師透過遠端線上FPGA開發板探索RISC-V處理器

Andes Technology USA Corp. Announces Major Expansion of Its U.S. Operation

Company Announces Job Openings for San Jose Headquarters and Portland R&D Office

San Jose, California October 8, 2021 – Andes Technology USA Corp., the headquarters of North America operations of Hsinchu, Taiwan-based Andes Technology Corporation, a leading supplier of high efficiency, low-power 32/64-bit RISC-V processor cores and founding premier member of RISC-V International, today announced a major expansion of Its U.S. operation. Andes Technology USA is greatly increasing engineering headcount in both the San Jose, California headquarters and its Portland, Oregon research and development facility. Andes Technology USA is seeking engineers in the U.S. and Canada to work remotely or in the Portland or San Jose offices. Openings are available for design engineers, verification engineers, and field application engineers.

Andes Technology USA Corp. was established in 2015 as a California corporation coincident with Andes Technology Corp. joining RISC-V International. After Andes took the RISC-V instruction set architecture (ISA) as the base to form its fifth generation architecture, AndeStar™ V5 and started developing V5 processor IP’s, the U.S. operation was formed to be nearby early customer adopters of the new ISA. The U.S. subsidiary established an R&D lab shortly thereafter and began developing architectures for the high-end RISC-V processors. In under a year the investment together with the main engineering team in Taiwan yielded the first commercial RISC-V Vector processor IP which won nearly 10 projects including datacenter projects from a large OEM so far.

“Major semiconductor companies worldwide adopting the RISC-V ISA and the RISC-V International work groups rapid development of the RISC-V ISA extensions is driving demand for engineers to keep up with the fast pace of new technology development,” said Emerson Hsiao, Andes Technology USA Corp. Chief Operating Officer. “RISC-V customers like the growing number of extensions coming available as well as their ability to customize the architecture to better fit their processing requirements. Our tool Andes Custom Extensions (ACE) makes the customization process easier and less risky. To keep up with RISC-V technical developments and to serve our customers’ requests, we expect to greatly expand the size of our U.S. operation.”

Engineers interested in Andes are encouraged to view the open positions on the Andes Technology LinkedIn page.

 

About Andes Technology USA Corp.
Andes Technology USA Corp. was formed as a California corporation in 2015 in San Jose California to develop high-end CPU architectures. Emerson Hsiao, Chief Operating Officer heads the office, located in the heart of Silicon Valley in San Jose. In June 2018, the U.S. operation added its R&D facility in Portland, Oregon to attract engineers in the Pacific Northwest and Canada. To date, the U.S. operation continues to develop new high-end CPU processor architecture. Its most significant achievement is the development of the first RISC-V vector architecture based on the RISC-V International RVV specification. Andes developed the first RISC-V vector architecture based on version V0.8 of the specification and has advanced it to the latest to-be-ratified version.

About Andes Technology
Sixteen years in business and a Founding Premier member of RISC-V International, Andes is a leading supplier of high-performance/low-power 32/64-bit embedded processor IP solutions, and a main force to take RISC-V mainstream. Andes’ fifth-generation architecture AndeStar™ adopted the RISC-V as the base. Its V5 RISC-V CPU families range from tiny 32-bit cores to advanced 64-bit cores with DSP, FPU, Vector, Linux, superscalar, and/or multicore capabilities. The annual volume of Andes-Embedded SoCs has exceeded 2 billion since 2020 and continues to rise. To the end of 2020, the cumulative volume of Andes-Embedded™ SoCs has surpassed 7 billion.

About RISC-V AndesCore™
Andes Technology’s comprehensive CPU includes entry-level, mid-range, high-end, extensible and security families to address the full range of embedded electronics products, especially for connected, smart and green applications. From 2017, Andes expands its product line to RISC-V processors and provides a total solution in V5 family cores, including N22, N25F/NX25F, D25F, A25/AX25, A25MP/AX25MP, A27/AX27/NX27V, A45/D45/N45, AX45/DX45/NX45 and A45MP/AX45MP.

For more information, please visit https://www.andestech.com. Follow Andes on LinkedIn, Twitter, Facebook, and YouTube!

Contact Information
Andes Technology –  hr@andestech.com

Continue ReadingAndes Technology USA Corp. Announces Major Expansion of Its U.S. Operation

晶心科順利發行海外存託憑證 完成首次於盧森堡發行GDR募資 並發表積極成長計畫

【台灣新竹】─ 2021年10月7日─ RISC-V 中央處理器矽智財供應商晶心科 (6533-TW) 今 (7) 日宣布，已於9月13日順利完成海外存託憑證 (GDR) 發行，於盧森堡證交所掛牌上市，新發行之海外存託憑證每單位表彰普通股 2 股，以31.78美元，折算約為每股新台幣 440 元，共發行 400 萬單位，相當於普通股 800萬股，海外募得之總金額約為1.27億美元(折合為新台幣35.17億元)。晶心科是目前唯一發行GDR募資的RISC-V CPU IP供應商，而響應本次募資之持有者主要為海外機構投資人，以長期持有為投資策略。

晶心科董事長林志明表示，本次募資的最主要目的是充實中長期營運資金，投資研發，健全產品線佈局，加重發展高階技術產品，同時也能使全球投資人能一起分享RISC-V快速成長之市場。本次募得之資金主要將運用於加速擴大產品設計中心規模，除強化現有RISC-V產品的領先外，更將因應市場急需RISC-V高階運算的解決方案，加速研發高價值之高階RISC-V CPU IP，以及整合系統晶片之軟硬體開發平台。台灣及美、加之設計中心計畫於分階段於3-5年內，招募二百位研發人才，投入開發RISC-V 下一世代之產品，以搶佔高價之高階多核CPU IP市場，增加銷售動能，應用領域包括5G、人工智慧/機器學習、HPC、ADAS、車用電子、AR/VR、區塊鏈、雲端運算、資料中心、伺服器、物聯網、MCU、儲存裝置、安防、無線裝置等大量及高速運算之市場。

根據晶心科公布2021年上半年財報資料顯示，2021上半年之較去年同期成長72.6%，其中63%之營收皆來自RISC-V，包括標準IP授權及客製運算業務，而晶心也分別以2019及2020兩年營收總成長率(對比2018)將近100%的成績，連續進入天下2020、2021之「快速成長一百強」榜單。此外，根據Counterpoint Research最新調查報告指出，隨著半導體解決方案中所需之IP技術要求更多元，純IP供應商之市場將以年複合成長率11%的持續擴大，於2025年達到86億美元的市場規模。而RISC-V因其開源優勢、極佳的功耗比、高安全性及低政治風險等因素，在IP授權市場中具有強勁成長之優勢，預計在2025年將於IoT應用、工業應用、車用等三大產業中，成長至分別占28%、12%、10%的市場佔有率，成為應用的關鍵領域，這些都是晶心市場擴大的有利發展因素。

晶心科技總經理暨技術長蘇泓萌博士表示，晶心的產品雖是硬體IP (Intellectual Property 智慧財產授權)，但和軟體公司一樣，研發人力就是腦力密集的生產線。晶心成立以來持續投入大量研發資源，專注於處理器IP系列產品的開發，這是支持晶心近年來營收屢創新高的最主要原因。為保持同樣增長動能，晶心將加速招募更多全球人才投入研發，在現有產品基礎上，創造具高價值優勢之高階產品，滿足市場對RISC-V 高階運算產品的需求，以期與市場共同成長。

展望未來十年，越來越多的國際大廠加入RISC-V陣營，擴大RISC-V市場及應用。晶心決心將繼續強化技術領先者的地位，並基於多年協助客戶導入各式產品量產之豐富經驗，於未來RISC-V CPU IP市場，幫助更多RISC-V SoC設計團隊推出產品，以實現高幅度的營收成長及獲利。

RISC-V demandRISC-V in 2025 

 

關於晶心科技
晶心科技股份有限公司於2005年成立於新竹科學園區，2017年於台灣證交所上市(TWSE:6533)。晶心是RISC-V國際協會的創始首席會員，也是第一家採用RISC-V作為其第五代架構AndeStar™基礎的主流CPU供應商。為了滿足當今電子設備的苛刻要求，晶心提供了可配置性高的32/64位高效CPU核心，包含DSP，FPU，Vector，超純量(Superscalar)及多核心系列，可應用於各式SoC與應用場景。晶心並提供功能齊全的整合開發環境和全面的軟/硬體解決方案，可幫助客戶在短時間內創新其SoC設計。在2020年，Andes-Embedded™ SoC的年出貨量突破20億顆，而截至2020年底，嵌入AndesCore™的SoC累積總出貨量已超過70億顆。
更多關於晶心的資訊，請參閱晶心官網https://www.andestech.com。追蹤晶心最新消息：LinkedIn、Facebook、Weibo、Twitter、Bilibili以及YouTube。

Continue Reading晶心科順利發行海外存託憑證 完成首次於盧森堡發行GDR募資 並發表積極成長計畫

Menta和晶心科技宣布建立合作關係　使硬體擴充指令集架構可重新配置

【法國蘇菲亞科學園區】─2021年9月23日─ eFPGA(嵌入式FPGA)解決方案的領導供應商Menta S.A.S與32/64位元RISC-V嵌入式處理器核心領導供應商暨RISC-V國際協會(RISC-V International)創始首席會員晶心科技於今日宣布IP的技術合作。

晶心科技與Menta合作讓晶心RISC-V AndesCore™系列可透過eFPGA達到嵌入式可程式邏輯控制(embedded programmable logic)。Menta和晶心科技的合作將能為客戶提供聯合解決方案，以在製造後的SoC裡新增客製化擴展指令，為目標應用達到倍數的加速效果。

下一代處理器最主要的差異化因素是能夠自定義擴充的指令。RISC-V AndesCore™全面支持在RTL階段擴充指令，而和eFPGA搭配使用則可在SoC製造後，再根據最終應用擴充指令。設計人員可以在RISC-V規範規格下，為想要加速的應用程序增加所需的任何指令。如此強大的功能既不會破壞任何軟體的兼容性，還能為開發和差異化保留發展空間。

「Menta很榮幸能與晶心科技建立密切的合作關係，」Menta執行長Vincent Markus表示。「創新的RISC-V指令集架構(ISA)技術擁有開源、精簡、模組化和可擴展的設計，非常適合Menta eFPGA產品線的策略。」

eFPGA的角色是RISC-V CPU硬體擴充核心的一部份，它開啟了產品在生命週期內，增加或重新配置指令集架構(ISA)的可能性。晶心RISC-V處理器系列已在SoC市場成為主流的計算引擎，現在透過支援eFPGA硬體的擴展，增強客製化產品ACE (Andes Custom Extension™)的功能。

ACE是一個能在晶心RISC-V處理器核心上定義新指令的強大架構。透過ACE的簡易腳本程式來描述指令的輸入輸出和功能，以及使用ACE的精簡Verilog來定義指令在RTL層級的實現方式。SoC設計人員可以輕鬆運用晶心自定義指令的開發工具COPILOT(Custom-OPtimized Instruction deveLOpment Tools)，根據上述的設計資料，自動生成擴展晶心處理器所需的所有新組件，包括處理器的RTL、編譯工具、調試器、整合開發環境和近精確週期(near cycle-accurate)的模擬器，以支援客製化新指令並實現加速特定領域的應用。

「透過與Menta的合作，晶心科技能為市場帶來全新的CPU核心的應用方式，將更加支援RISC-V生態系的可擴展性，尤其是在強烈需要建立差異化的應用中，例如人工智慧以及 5G，」晶心科技總經理暨技術長蘇泓萌博士表示。「客戶可以在晶片製造完成後，通過使用Menta eFPGA的解決方案，重新配置ACE的自定義指令，從而在預期成本內最佳化並強化他們的硬體。」

Menta的預編程式eFPGA核心與晶心RISC-V CPU核心相結合，將提供專門的使用者界面及工具，可以在完整和最佳化的軟體解決方案中，對eFPGA矩陣進行設定，並設定RISC-V應用中可編程的參數。

關於晶心科技
晶心科技股份有限公司於2005年成立於新竹科學園區，2017年於台灣證交所上市(TWSE:6533)。晶心是RISC-V國際協會的創始首席會員，也是第一家採用RISC-V作為其第五代架構AndeStar™基礎的主流CPU供應商。為了滿足當今電子設備的苛刻要求，晶心提供了可配置性高的32/64位高效CPU核心，包含DSP，FPU，Vector，超純量(Superscalar)及多核心系列，可應用於各式SoC與應用場景。晶心並提供功能齊全的整合開發環境和全面的軟/硬體解決方案，可幫助客戶在短時間內創新其SoC設計。在2020年，Andes-Embedded™ SoC的年出貨量突破20億顆，而截至2020年底，嵌入AndesCore™的SoC累積總出貨量已超過70億顆。
更多關於晶心的資訊，請參閱晶心官網https://www.andestech.com。追蹤晶心最新消息：LinkedIn、Facebook、Weibo、Twitter、Bilibili以及YouTube。

關於Menta
Menta是一家位於法國蘇菲亞科學園區的私人控股公司。對於講求效率、希望產品在第一次設計就正確及可快速投入量產的ASIC和SoC設計人員而言，Menta是經過驗證的eFPGA領導供應商，其設計能適應標準的單元架構(cell-based architecture)加上最先進的工具集，可以為SoC設計帶來最高等級的客製化、高標準的測試性和最快的量產時間，並且應用於所有代工廠的任一製程。更多有關Menta的資訊，請至公司網站：www.menta-efpga.com。

Continue ReadingMenta和晶心科技宣布建立合作關係　使硬體擴充指令集架構可重新配置

Andes Technology Corp. Brings Its Broad Family of RISC-V CPU IP to the Silicon Catalyst Semiconductor Incubator

Hsinchu, Taiwan and Silicon Valley, CA – September 8, 2021 – Andes Technology Corporation (TWSE: 6533), a leading supplier of high efficiency, low-power 32/64-bit RISC-V processor cores and Founding Premier member of RISC-V International, today announced that it has joined Silicon Catalyst’s In-Kind Partner program. Andes Technology will make available a wide range of its RISC-V processors to startups participating in the Silicon Catalyst incubator program.

These include all Andes RISC-V offerings between the smallest N22 to its multicore 5-stage pipeline 25 and 27 families with P extension, floating point, L2 cache controller and memory management unit. Incubator startups will also have access to Andes’ AE250 Pre-integrated AHB platform, AE350 Pre-integrated AXI platform, and AndeSight Eclipse-based Integrated Development Environment.

“Andes has been helping a steady stream of new design starts to incorporate our wide range of RISC-V AndesCore™ processors,” said Dr. Charlie Su, President and CTO of Andes Technology. “Silicon start-ups such as those in the Silicon Catalyst incubator program are ideal examples of the new ventures. Many have great products on papers but need the IP and tools to lift their design from the page and implement it in silicon. The Silicon Catalyst incubator and Andes provide them the perfect environment and high efficiency RISC-V CPU IPs to achieve this goal. We are delighted to be part of this endeavor.”

“We applaud Andes’ initiative in expanding the reach and visibility of the RISC-V ISA,” said Calista Redmond, CEO of RISC-V International. “As an open computing platform, the continued growth and adoption of RISC-V depends on a broad ecosystem of hardware and software tools and IP. Andes contributing its silicon-proven RISC-V IP to the Silicon Catalyst incubator will help make it easier for emerging startups to build the next generation of semiconductor applications with RISC-V.”

The mission of Silicon Catalyst is to lower the capital expenses associated with the design and fabrication of silicon-based IC’s, sensors, and MEMS devices. For over seven years, the Silicon Catalyst partner ecosystem has enabled early-stage companies to build complex silicon chips at a fraction of the typical cost. Silicon Catalyst has created a unique ecosystem to provide critical support to semiconductor hardware start-ups, including tools and services from a comprehensive network of In-Kind Partners (IKPs). The Portfolio Companies in the incubator utilize IKP tools and services including design tools, simulation software, design services, foundry PDK access and MPW runs, test program development, tester access, and banking and legal services. Additionally, the startups can tap into the world-class Silicon Catalyst network of advisors and investors.

“Adding a tier one RISC-V IP supplier such as Andes Technology; with its broad range of IP, hardware design tools, and integrated software development environment; broadens the selection of design IP and tools our incubator companies have to create with,” said Paul Pickering, Managing Partner at Silicon Catalyst. “Andes’ success with startups in the emerging 5G and AI chip markets demonstrates their understanding of nurturing new ventures building products for markets that are just beginning to field large numbers of new silicon designs. We are pleased to have them join the Silicon Catalyst incubator and look forward to seeing new designs containing their IP.”

About  Silicon Catalyst
It’s About What’s Next® – Silicon Catalyst is the world’s only incubator focused exclusively on accelerating solutions in silicon (including IP, MEMS & sensors), building a coalition of in-kind and strategic partners to dramatically reduce the cost and complexity of development. More than 400 startup companies have engaged with Silicon Catalyst since April 2015, with a total of 38 startup and early-stage companies admitted to the incubator. With a world-class network of mentors to advise startups, Silicon Catalyst is helping new semiconductor companies address the challenges in moving from idea to realization. The incubator/accelerator supplies startups with a path to design tools, silicon devices, networking, access to funding, banking and marketing acumen to successfully launch and grow their companies’ novel technology solutions. The Silicon Catalyst Angels was established in July 2019 as a separate organization to provide access to seed and Series A funding for Silicon Catalyst portfolio companies.

More information is available at www.siliconcatalyst.com and www.siliconcatalystangels.com

About Andes Technology
Sixteen years in business and a Founding Premier member of RISC-V International, Andes is a leading supplier of high-performance/low-power 32/64-bit embedded processor IP solutions, and a main force to take RISC-V mainstream. Andes’ fifth-generation architecture AndeStar™ adopted the RISC-V as the base. Its V5 RISC-V CPU families range from tiny 32-bit cores to advanced 64-bit cores with DSP, FPU, Vector, Linux, superscalar, and/or multicore capabilities. The annual volume of Andes-Embedded SoCs has exceeded 2 billion since 2020 and continues to rise. To the end of 2020, the cumulative volume of Andes-Embedded™ SoCs has surpassed 7 billion.

For more information, please visit https://www.andestech.com. Follow Andes on LinkedIn, Twitter, Facebook, and YouTube!

About RISC-V AndesCore™
Andes Technology’s comprehensive CPU includes entry-level, mid-range, high-end, extensible and security families to address the full range of embedded electronics products, especially for connected, smart and green applications. From 2017, Andes expands its product line to RISC-V processors and provides a total solution in V5 family cores, including N22, N25F/NX25F, D25F, A25/AX25, A25MP/AX25MP, A27/AX27/NX27V, A45/D45/N45, AX45/DX45/NX45 and A45MP/AX45MP.

For more information about Andes Technology products, please visit http://www.andestech.com/

Contact Information
Andes Technology – Jonah McLeod , jonahm@andestech.com

Silicon Catalyst – Richard Curtin, richard@siliconcatalyst.com

Continue ReadingAndes Technology Corp. Brings Its Broad Family of RISC-V CPU IP to the Silicon Catalyst Semiconductor Incubator

Imperas模擬器支援Andes Custom Extension™　加速特定領域應用軟體開發

【台灣新竹、英國牛津】─ 2021年8月31日─ 32及64位元高效能、可擴展RISC-V CPU處理器核心領導供應商、RISC-V國際協會(RISC-V International)創始首席會員晶心科技(TWSE: 6533) 和高效能軟體模擬和虛擬平台的領導供應商Imperas Software Ltd.於今日宣布將合作範圍拓展到整合開發多功能的Andes Custom Extension™ (ACE)和Imperas高速模擬器。此合作將使SoC設計團隊能夠利用ACE架構來共同設計新指令硬體和相關軟體，在晶片生產之前便可以開始完整的軟體開發。

在ACE的架構下，SoC設計者可以輕鬆且有效率地在Andes RISC-V處理器核心上定義新指令來加速目標應用程式，即透過ACE的簡易腳本程式來描述指令的輸入輸出和功能，及使用ACE的精簡Verilog來定義指令在RTL層級的實現方式。根據上述的設計資料，功能強大的COPILOT（Custom-OPtimized Instruction deveLOpment Tools）工具可以自動生成擴展晶心處理器所需的所有新組件，包括處理器的RTL、編譯工具、調試器、整合開發環境和近精確週期 (near cycle-accurate)的模擬器，以支援客製化的新指令。

當SoC架構師和邏輯設計人員著眼於加速他們的應用最花時間的部分，軟體工程師則需要在增加新功能的同時，確保整個軟體堆疊的功能性和穩健性。在SoC晶片完成設計生產並可用於全面開發之前，快速功能模擬器能讓軟體工程師開始撰寫應用程式、除錯和測試，而不需要受限於硬體開發的時程。藉由連結COPILOT產生的擴展模擬程式庫，Imperas模擬器能如同手動撰寫的模擬器一般，自動辨識新指令並模擬其功能。利用快速模擬器和相關工具，軟體工程師除了可以進行全面開發，更可以提供回饋意見給硬體設計人員。

「晶心所有的RISC-V CPU 核心都是可以擴展的。ACE讓SoC設計人員在不需要CPU設計的能力之下，就能在我們高效能的CPU核心上就能輕鬆的新增客製化指令，來實現特定應用領域的加速，並提升SoC性能至新的水平，」晶心科技總經理暨技術長蘇泓萌博士表示。「Imperas模擬器已經能夠支援晶心的RISC-V CPU核心。我們很高興能夠拓展合作範疇，使ACE用戶透過使用Imperas的快速模擬器，讓軟體工程師也可以從早期階段就參與整個開發過程。」

「RISC-V提供了客製化擴展指令集的靈活性，在符合軟體生態系統的同時，提供了系統架構工程師新的自由發展空間。」Imperas Software Ltd.執行長Simon Davidmann表示。「利用虛擬平台所建構的快速軟體架構增強ACE設計指令的解決方案。所共同產生的平台可在晶片生產完成前，就提供了虛擬開發板。晶心和Imperas的合作旨在幫助客戶和合作夥伴，以軟體開發的速度來創新硬體靈活性。」

本次合作在ACE的解決方案中增加快速模擬器及虛擬平台的功能，SoC設計團隊可利用晶心RISC-V核心處理器的ACE架構來新增客製化指令，並使用COPILOT工具立即自動生成所有必要組件。這些擴展組件包括處理器RTL、編譯工具、調試器、近精確週期模擬器以及Imperas的快速功能模擬器。

關於晶心科技
晶心科技股份有限公司於2005年成立於新竹科學園區，2017年於台灣證交所上市(TWSE:6533)。晶心是RISC-V國際協會的創始首席會員，也是第一家採用RISC-V作為其第五代架構AndeStar™基礎的主流CPU供應商。為了滿足當今電子設備的苛刻要求，晶心提供了可配置性高的32/64位高效CPU核心，包含DSP，FPU，Vector，超純量(Superscalar)及多核心系列，可應用於各式SoC與應用場景。晶心並提供功能齊全的整合開發環境和全面的軟/硬體解決方案，可幫助客戶在短時間內創新其SoC設計。在2020年，Andes-Embedded™ SoC的年出貨量突破20億顆，而截至2020年底，嵌入AndesCore™的SoC累積總出貨量已超過70億顆。更多關於晶心的資訊，請參閱晶心官網 https://www.andestech.com，或追蹤晶心Facebook、LinkedIn、Twitter、YouTube、Weibo以及Bilibili。 

關於Imperas 
Imperas 致力於嵌入式軟體和系統的開發，並且是RISC-V處理器模型和虛擬原型解決方案的領導供應商。Imperas和開放虛擬平台(OVP)推進了開源模型，包含一系列處理器、IP供應商、CPU架構、系統IP及處理器和系統的參考平台模型，參考平台模型的部分從簡單的單核裸機(bare metal)平台到啟動 SMP Linux 的全異構多核系統。所有支援模型都可從Imperas網站www.imperas.com和開放虛擬平台(OVP)網站 www.ovpworld.org取得。

Continue ReadingImperas模擬器支援Andes Custom Extension™　加速特定領域應用軟體開發

Andes Technology And Cyberon Collaborate To Provide Edge-Computing Voice Recognition Solution On DSP-Capable RISC-V Processors

Press highlights:

  • Cyberon DSpotter, the voice wake-up and local command recognition solution, supports Andes RISC-V CPU families
  •  The local and offline command recognition provides users with a quick-response voice operation interface, protects personal privacy, and also reduces the development and maintenance costs of the device manufacturers.
  •  AndesCore™ D25F with DSP/SIMD P-extension instructions boosts the computing performance and efficiency for voice processing to provide competitive voice recognition and voice assistant solutions on edge devices

HSINCHU, TAIWAN – August 19, 2021 – Cyberon Corporation, a leading embedded speech solution provider, and Andes Technology (TWSE: 6533), a major supplier for high efficiency, low-power 32/64-bit RISC-V processor cores, announced their collaboration on the edge-computing voice recognition solution, Cyberon DSpotter, by exploring Andes DSP-capable RISC-V CPU cores such as the popular D25F and comprehensive software development environment to provide a cost-effective, high performance, and easy-to-deploy solution.

The development of AI technology has recently brought tremendous progress in speech recognition. In addition to voice assistant services based on cloud-computing architecture, there are growing demands for local voice recognition by edge-computing devices from the market. Locally executed offline command recognition provides users with a quick-response voice operation interface, protects personal privacy, and reduces the development and maintenance costs of the device manufacturers.

For many products that have a strong demand for voice control, such as wearable devices, home appliances, IoT devices, etc., low computing resource requirements and high recognition performance are important considerations. Therefore, Cyberon based on more than 20 years of professional experience, introduces its new generation algorithm, DSpotter, for voice wake-up and local command recognition.

Different from most solutions in the market, Cyberon’s DSpotter adopts phoneme-based acoustic model to improve customers’ product development efficiency. Developers do not need to collect a large amount of training corpus in advance. They can create the required commands by simply entering text. Based on the relevant foundation built over the past years, Cyberon has developed more than 40 global languages for DSpotter. It helps customers to introduce their products to the global market in a timely manner. Regarding the recognition performance, DSpotter has high accuracy and high noise robustness due to the strength of its acoustic model consisting of TDNN-F architecture. In addition, the algorithm has been well optimized by Cyberon to fit into general MCU platforms without using a dedicated neural network processor. In this way, manufacturers can provide products with voice interfaces through cost-effective hardware.

Furthermore, the performance of DSpotter is increased significantly by leveraging RISC-V DSP/SIMD P-extension (RVP) instructions on AndesCore™ D25F, a 32-bit RISC-V CPU core with highly optimized 5-stage pipeline. The RVP enables multiple data in integer registers to be processed in one single cycle, thus efficiently boosts the computations for voice, audio, image and signal processing. It also greatly improves performance for edge AI involving the above data types. The D25F is the first market-proven RISC-V RVP-capable processor, and has the most complete ecosystem in development tools, libraries for DSP and neural networks, and audio/voice codec.

“The AI technology of edge computing has gradually entered people’s lives,” said Alex Liou, VP of Cyberon Embedded solution BU. “Cyberon’s DSpotter algorithm helps developers to reduce development costs of voice recognition applications. We offer a convenient and easy-to-use tool to create customized commands of global languages. Developers can create various voice recognition applications efficiently to meet the strong and diverse demands of the market. The collaboration with Andes extends the application of DSpotter technology to RISC-V platforms and demonstrates excellent computing and recognition performances. It is hoped that it will bring more products with intelligent and convenient voice interface to people’s lives.”

”Intelligence is now in everyone’s daily life empowering not only by cloud computing but also by edge computing,” said Simon Wang, Technical Marketing Manager of Andes Technology, and in charge of RISC-V compute acceleration ecosystem. “Andes offers a comprehensive 32 and 64 bit RISC-V processor core series with high computation efficiency and low power consumption for general computing solutions. In addition, we provide AI solutions based on RVP, RVV and ACE instruction extensions with the support of Andes NN SDK and have been cooperating with partners to extend our solutions. We are excited to work with Cyberon to offer very competitive voice recognition and voice assistant solutions for edge devices based on the strength of AndesCore™ D25F, esp. its RVP support.”

About Cyberon Corporation
Cyberon Corporation, with its headquarter in New Taipei City, Taiwan, is a leading speech solution provider. Established in 2000, Cyberon has rich experiences in speech algorithm and application development. Its speech recognition and text-to-speech technologies have been widely adopted by IOT devices, home appliances, wearable devices, smart toys, automotive equipment, and enterprise customers. Cyberon provides a full range of voice solutions for embedded MCU/DSP, OS platforms, and server-based services, and is committed to providing users with natural and convenient human-machine voice interfaces. For more information, please visit http://www.cyberon.com.tw

About Andes Technology
Sixteen years in business and a Founding Premier member of RISC-V International, Andes is a leading supplier of high-performance/low-power 32/64-bit embedded processor IP solutions, and a main force to take RISC-V mainstream. Andes’ fifth-generation AndeStar™ architecture adopted the RISC-V as the base. Its V5 RISC-V CPU families range from tiny 32-bit cores to advanced 64-bit cores with DSP, FPU, Vector, Linux, superscalar, and/or multicore capabilities. The annual volume of Andes-Embedded SoCs has exceeded 2 billion since 2020 and continues to rise. To the end of 2020, the cumulative volume of Andes-Embedded™ SoCs has reached 7 billion. For more information, please visit https://www.andestech.com. Follow Andes on LinkedIn, Twitter, Facebook, and YouTube! 

Continue ReadingAndes Technology And Cyberon Collaborate To Provide Edge-Computing Voice Recognition Solution On DSP-Capable RISC-V Processors